aarch64: Neoverse V1 tweaks
This simple follow-on patch groups the Neoverse cores together and adds a missing feature bit (F16) to the entry for Neoverse V1. gas/ChangeLog: * config/tc-aarch64.c (aarch64_cpus): Group Neoverse cores together, add missing F16 bit to Neoverse V1.
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@ -1,3 +1,8 @@
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2020-09-28 Alex Coplan <alex.coplan@arm.com>
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* config/tc-aarch64.c (aarch64_cpus): Group Neoverse cores together,
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add missing F16 bit to Neoverse V1.
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2020-09-26 Alan Modra <amodra@gmail.com>
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* config/tc-csky.c (parse_type_ctrlreg): Don't mask mach_flag
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@ -8956,6 +8956,15 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {
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| AARCH64_FEATURE_DOTPROD
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| AARCH64_FEATURE_PROFILE),
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"Neoverse N1"},
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{"neoverse-v1", AARCH64_FEATURE (AARCH64_ARCH_V8_4,
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AARCH64_FEATURE_PROFILE
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| AARCH64_FEATURE_CVADP
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| AARCH64_FEATURE_SVE
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| AARCH64_FEATURE_SSBS
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| AARCH64_FEATURE_RNG
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| AARCH64_FEATURE_F16
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| AARCH64_FEATURE_BFLOAT16
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| AARCH64_FEATURE_I8MM), "Neoverse V1"},
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{"qdf24xx", AARCH64_FEATURE (AARCH64_ARCH_V8,
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AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO
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| AARCH64_FEATURE_RDMA),
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@ -8977,14 +8986,6 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {
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{"xgene2", AARCH64_FEATURE (AARCH64_ARCH_V8,
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AARCH64_FEATURE_CRC), "APM X-Gene 2"},
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{"cortex-r82", AARCH64_ARCH_V8_R, "Cortex-R82"},
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{"neoverse-v1", AARCH64_FEATURE (AARCH64_ARCH_V8_4,
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AARCH64_FEATURE_PROFILE
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| AARCH64_FEATURE_CVADP
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| AARCH64_FEATURE_SVE
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| AARCH64_FEATURE_SSBS
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| AARCH64_FEATURE_RNG
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| AARCH64_FEATURE_BFLOAT16
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| AARCH64_FEATURE_I8MM), "Neoverse V1"},
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{"generic", AARCH64_ARCH_V8, NULL},
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{NULL, AARCH64_ARCH_NONE, NULL}
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