diff --git a/gold/ChangeLog b/gold/ChangeLog
index 1a75a1e7f3..3c9b75cc49 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-26  Jing Yu  <jingyu@google.com>
+
+	* aarch64.cc (Relocate::tls_desc_gd_to_ie): Set ldr target
+	register to be x0 when to relax TLSDESC_LD64_LO12.
+
 2014-11-26  Alan Modra  <amodra@gmail.com>
 
 	* powerpc.cc (struct Stub_table_owner): New.
@@ -162,7 +167,7 @@
 	* aarch64.cc (AArch64_relocate_functions::maybe_apply_stub):
 	Add "typename" keyword.
 
-2014-09-22  Han Shen  <shenhan@google.com>
+2014-10-15  Han Shen  <shenhan@google.com>
             Jing Yu   <jingyu@google.com>
 
 	Patch for gold aarch64 backend to support relaxation.
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index 125953a989..d5a0a8545b 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -6536,6 +6536,11 @@ Target_aarch64<size, big_endian>::Relocate::tls_desc_gd_to_ie(
 
     case elfcpp::R_AARCH64_TLSDESC_LD64_LO12:
       {
+       // Set ldr target register to be x0.
+       Insntype insn = elfcpp::Swap<32, big_endian>::readval(ip);
+       insn &= 0xffffffe0;
+       elfcpp::Swap<32, big_endian>::writeval(ip, insn);
+       // Do relocation.
 	const AArch64_reloc_property* reloc_property =
 	    aarch64_reloc_property_table->get_reloc_property(
 	      elfcpp::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC);