opcodes/ChangeLog
* cr16-dis.c (match_opcode,make_instruction: Remove static declaration. (dwordU,wordU): Moved typedefs to opcode/cr16.h (cr16_words,cr16_allWords,cr16_currInsn): Added prefix 'cr16_' bfd/Changelog * config.bfd (cr16*-*-uclinux*): New target support. include/opcode/ChangeLog * cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c (make_instruction,match_opcode): Added function prototypes. (cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
This commit is contained in:
Nick Clifton
parent
60c5dd9394
commit
bab4becb12
3288
bfd/ChangeLog
3288
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@ -1,6 +1,6 @@
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# config.bfd
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#
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# Copyright 2012 Free Software Foundation
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# Copyright 2012, 2013 Free Software Foundation
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#
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# This file is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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@ -378,7 +378,7 @@ case "${targ}" in
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targ_underscore=yes
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;;
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cr16-*-elf*)
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cr16-*-elf* | cr16*-*-uclinux*)
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targ_defvec=bfd_elf32_cr16_vec
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targ_underscore=yes
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;;
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@ -1,3 +1,9 @@
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2013-01-02 Kaushik Phatak <kaushik.phatak@kpitcummins.com>
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* cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c
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(make_instruction,match_opcode): Added function prototypes.
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(cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
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2012-11-23 Alan Modra <amodra@gmail.com>
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* ppc.h (ppc_parse_cpu): Update prototype.
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@ -1,5 +1,5 @@
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/* cr16.h -- Header file for CR16 opcode and register tables.
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Copyright 2007, 2008, 2010 Free Software Foundation, Inc.
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Copyright 2007, 2008, 2010, 2013 Free Software Foundation, Inc.
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Contributed by M R Swami Reddy
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This file is part of GAS, GDB and the GNU binutils.
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@ -26,7 +26,7 @@
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Therefore, order MUST be preserved. */
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typedef enum
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{
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{
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/* 16-bit general purpose registers. */
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r0, r1, r2, r3,
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r4, r5, r6, r7,
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@ -40,7 +40,7 @@ typedef enum
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/* Not a register. */
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nullregister,
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MAX_REG
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}
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}
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reg;
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/* CR16 processor registers and special registers :
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@ -48,7 +48,7 @@ reg;
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(cr16_pregtab). Therefore, order MUST be preserved. */
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typedef enum
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{
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{
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/* processor registers. */
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dbs = MAX_REG,
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dsr, dcrl, dcrh,
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@ -64,17 +64,17 @@ typedef enum
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/* Not a processor register. */
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nullpregister = usph + 1,
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MAX_PREG
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}
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}
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preg;
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/* CR16 Register types. */
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typedef enum
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{
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{
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CR16_R_REGTYPE, /* r<N> */
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CR16_RP_REGTYPE, /* reg pair */
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CR16_P_REGTYPE /* Processor register */
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}
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}
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reg_type;
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/* CR16 argument types :
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@ -89,10 +89,10 @@ reg_type;
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idxrp - index with register pair
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rbase - register base
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rpbase - register pair base
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pr - processor register */
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pr - processor register. */
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typedef enum
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{
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{
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arg_r,
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arg_c,
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arg_cr,
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@ -110,13 +110,13 @@ typedef enum
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arg_ra,
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/* Not an argument. */
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nullargs
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}
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}
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argtype;
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/* CR16 operand types:The operand types correspond to instructions operands.*/
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/* CR16 operand types:The operand types correspond to instructions operands. */
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typedef enum
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{
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{
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dummy,
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/* N-bit signed immediate. */
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imm3, imm4, imm5, imm6, imm16, imm20, imm32,
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@ -151,7 +151,7 @@ typedef enum
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nulloperand,
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/* Maximum supported operand. */
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MAX_OPRD
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}
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}
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operand_type;
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/* CR16 instruction types. */
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@ -239,18 +239,18 @@ operand_type;
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/* Single operand description. */
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typedef struct
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{
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{
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/* Operand type. */
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operand_type op_type;
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/* Operand location within the opcode. */
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unsigned int shift;
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}
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}
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operand_desc;
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/* Instruction data structure used in instruction table. */
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typedef struct
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{
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{
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/* Name. */
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const char *mnemonic;
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/* Size (in words). */
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@ -264,13 +264,13 @@ typedef struct
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unsigned int flags;
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/* Operands (always last, so unreferenced operands are initialized). */
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operand_desc operands[MAX_OPERANDS];
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}
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}
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inst;
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/* Data structure for a single instruction's arguments (Operands). */
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typedef struct
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{
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{
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/* Register or base register. */
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reg r;
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/* Register pair register. */
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@ -293,14 +293,14 @@ typedef struct
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int size;
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/* The type of the expression. */
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unsigned char X_op;
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}
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}
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argument;
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/* Internal structure to hold the various entities
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corresponding to the current assembling instruction. */
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typedef struct
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{
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{
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/* Number of arguments. */
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int nargs;
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/* The argument data structure for storing args (operands). */
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@ -313,37 +313,37 @@ typedef struct
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#endif /* TC_CR16 */
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/* Instruction size (in bytes). */
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int size;
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}
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}
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ins;
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/* Structure to hold information about predefined operands. */
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typedef struct
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{
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{
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/* Size (in bits). */
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unsigned int bit_size;
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/* Argument type. */
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argtype arg_type;
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/* One bit syntax flags. */
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int flags;
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}
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}
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operand_entry;
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/* Structure to hold trap handler information. */
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typedef struct
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{
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{
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/* Trap name. */
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char *name;
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/* Index in dispatch table. */
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unsigned int entry;
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}
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}
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trap_entry;
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/* Structure to hold information about predefined registers. */
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typedef struct
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{
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{
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/* Name (string representation). */
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char *name;
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/* Value (enum representation). */
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@ -358,7 +358,7 @@ typedef struct
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int image;
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/* Register type. */
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reg_type type;
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}
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}
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reg_entry;
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/* CR16 opcode table. */
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@ -435,4 +435,17 @@ extern const inst *instruction;
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typedef long long int LONGLONG;
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typedef unsigned long long ULONGLONG;
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/* Data types for opcode handling. */
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typedef unsigned long dwordU;
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typedef unsigned short wordU;
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/* Globals to store opcode data and build the instruction. */
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extern wordU cr16_words[3];
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extern ULONGLONG cr16_allWords;
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extern ins cr16_currInsn;
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/* Prototypes for function in cr16-dis.c. */
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extern void make_instruction (void);
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extern int match_opcode (void);
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#endif /* _CR16_H_ */
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@ -1,5 +1,5 @@
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/* Disassembler code for CR16.
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Copyright 2007, 2008, 2009, 2012 Free Software Foundation, Inc.
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Copyright 2007, 2008, 2009, 2012, 2013 Free Software Foundation, Inc.
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Contributed by M R Swami Reddy (MR.Swami.Reddy@nsc.com).
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This file is part of GAS, GDB and the GNU binutils.
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@ -36,9 +36,6 @@
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/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
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#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
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typedef unsigned long dwordU;
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typedef unsigned short wordU;
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typedef struct
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{
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dwordU val;
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@ -83,11 +80,11 @@ REG_ARG_TYPE;
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/* Current opcode table entry we're disassembling. */
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const inst *instruction;
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/* Current instruction we're disassembling. */
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ins currInsn;
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ins cr16_currInsn;
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/* The current instruction is read into 3 consecutive words. */
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wordU words[3];
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wordU cr16_words[3];
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/* Contains all words in appropriate order. */
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ULONGLONG allWords;
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ULONGLONG cr16_allWords;
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/* Holds the current processed argument number. */
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int processing_argument_number;
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/* Nonzero means a IMM4 instruction. */
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@ -281,7 +278,7 @@ getprocpregname (int reg_index)
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return "ILLEGAL REGISTER";
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}
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/* START and END are relating 'allWords' struct, which is 48 bits size.
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/* START and END are relating 'cr16_allWords' struct, which is 48 bits size.
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START|--------|END
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+---------+---------+---------+---------+
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@ -317,12 +314,13 @@ build_mask (void)
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/* Search for a matching opcode. Return 1 for success, 0 for failure. */
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static int
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int
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match_opcode (void)
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{
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unsigned long mask;
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/* The instruction 'constant' opcode doewsn't exceed 32 bits. */
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unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff;
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unsigned long doubleWord = (cr16_words[1]
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+ (cr16_words[0] << 16)) & 0xffffffff;
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/* Start searching from end of instruction table. */
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instruction = &cr16_instruction[NUMOPCODES - 2];
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@ -360,37 +358,43 @@ make_argument (argument * a, int start_bits)
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switch (a->type)
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{
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case arg_r:
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p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->r = p.val;
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break;
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case arg_rp:
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p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->rp = p.val;
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break;
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case arg_pr:
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p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->pr = p.val;
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break;
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case arg_prp:
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p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->prp = p.val;
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break;
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case arg_ic:
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p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->constant = p.val;
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break;
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case arg_cc:
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p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->cc = p.val;
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@ -400,28 +404,30 @@ make_argument (argument * a, int start_bits)
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if ((IS_INSN_MNEMONIC ("cbitb"))
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|| (IS_INSN_MNEMONIC ("sbitb"))
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|| (IS_INSN_MNEMONIC ("tbitb")))
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p = makelongparameter (allWords, 8, 9);
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p = makelongparameter (cr16_allWords, 8, 9);
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else
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p = makelongparameter (allWords, 9, 10);
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p = makelongparameter (cr16_allWords, 9, 10);
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a->i_r = p.val;
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p = makelongparameter (allWords, inst_bit_size - a->size, inst_bit_size);
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p = makelongparameter (cr16_allWords,
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inst_bit_size - a->size, inst_bit_size);
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a->constant = p.val;
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break;
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case arg_idxrp:
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p = makelongparameter (allWords, start_bits + 12, start_bits + 13);
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p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 13);
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a->i_r = p.val;
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p = makelongparameter (allWords, start_bits + 13, start_bits + 16);
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p = makelongparameter (cr16_allWords, start_bits + 13, start_bits + 16);
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a->rp = p.val;
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if (inst_bit_size > 32)
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{
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p = makelongparameter (allWords, inst_bit_size - start_bits - 12,
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p = makelongparameter (cr16_allWords, inst_bit_size - start_bits - 12,
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inst_bit_size);
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a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000));
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}
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else if (instruction->size == 2)
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{
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p = makelongparameter (allWords, inst_bit_size - 22, inst_bit_size);
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p = makelongparameter (cr16_allWords, inst_bit_size - 22,
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inst_bit_size);
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a->constant = (p.val & 0xf) | (((p.val >>20) & 0x3) << 4)
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| ((p.val >>14 & 0x3) << 6) | (((p.val >>7) & 0x1f) <<7);
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}
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@ -431,41 +437,42 @@ make_argument (argument * a, int start_bits)
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break;
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case arg_rbase:
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p = makelongparameter (allWords, inst_bit_size, inst_bit_size);
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p = makelongparameter (cr16_allWords, inst_bit_size, inst_bit_size);
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a->constant = p.val;
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p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
|
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p = makelongparameter (cr16_allWords, inst_bit_size - (start_bits + 4),
|
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inst_bit_size - start_bits);
|
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a->r = p.val;
|
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break;
|
||||
|
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case arg_cr:
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p = makelongparameter (allWords, start_bits + 12, start_bits + 16);
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p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 16);
|
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a->r = p.val;
|
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p = makelongparameter (allWords, inst_bit_size - 16, inst_bit_size);
|
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p = makelongparameter (cr16_allWords, inst_bit_size - 16, inst_bit_size);
|
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a->constant = p.val;
|
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break;
|
||||
|
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case arg_crp:
|
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if (instruction->size == 1)
|
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p = makelongparameter (allWords, 12, 16);
|
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p = makelongparameter (cr16_allWords, 12, 16);
|
||||
else
|
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p = makelongparameter (allWords, start_bits + 12, start_bits + 16);
|
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p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 16);
|
||||
a->rp = p.val;
|
||||
|
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if (inst_bit_size > 32)
|
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{
|
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p = makelongparameter (allWords, inst_bit_size - start_bits - 12,
|
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p = makelongparameter (cr16_allWords, inst_bit_size - start_bits - 12,
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inst_bit_size);
|
||||
a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000));
|
||||
}
|
||||
else if (instruction->size == 2)
|
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{
|
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p = makelongparameter (allWords, inst_bit_size - 16, inst_bit_size);
|
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p = makelongparameter (cr16_allWords, inst_bit_size - 16,
|
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inst_bit_size);
|
||||
a->constant = p.val;
|
||||
}
|
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else if (instruction->size == 1 && a->size != 0)
|
||||
{
|
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p = makelongparameter (allWords, 4, 8);
|
||||
p = makelongparameter (cr16_allWords, 4, 8);
|
||||
if (IS_INSN_MNEMONIC ("loadw")
|
||||
|| IS_INSN_MNEMONIC ("loadd")
|
||||
|| IS_INSN_MNEMONIC ("storw")
|
||||
@ -489,36 +496,37 @@ make_argument (argument * a, int start_bits)
|
||||
switch (a->size)
|
||||
{
|
||||
case 8 :
|
||||
p = makelongparameter (allWords, 0, start_bits);
|
||||
p = makelongparameter (cr16_allWords, 0, start_bits);
|
||||
a->constant = ((((p.val&0xf00)>>4)) | (p.val&0xf));
|
||||
break;
|
||||
|
||||
case 24:
|
||||
if (instruction->size == 3)
|
||||
{
|
||||
p = makelongparameter (allWords, 16, inst_bit_size);
|
||||
p = makelongparameter (cr16_allWords, 16, inst_bit_size);
|
||||
a->constant = ((((p.val>>16)&0xf) << 20)
|
||||
| (((p.val>>24)&0xf) << 16)
|
||||
| (p.val & 0xffff));
|
||||
}
|
||||
else if (instruction->size == 2)
|
||||
{
|
||||
p = makelongparameter (allWords, 8, inst_bit_size);
|
||||
p = makelongparameter (cr16_allWords, 8, inst_bit_size);
|
||||
a->constant = p.val;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits +
|
||||
a->size), inst_bit_size - start_bits);
|
||||
p = makelongparameter (cr16_allWords,
|
||||
inst_bit_size - (start_bits + a->size),
|
||||
inst_bit_size - start_bits);
|
||||
a->constant = p.val;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
p = makelongparameter (allWords, inst_bit_size -
|
||||
(start_bits + a->size),
|
||||
p = makelongparameter (cr16_allWords,
|
||||
inst_bit_size - (start_bits + a->size),
|
||||
inst_bit_size - start_bits);
|
||||
a->constant = p.val;
|
||||
}
|
||||
@ -734,13 +742,13 @@ print_arguments (ins *currentInsn, bfd_vma memaddr, struct disassemble_info *inf
|
||||
|
||||
/* Build the instruction's arguments. */
|
||||
|
||||
static void
|
||||
void
|
||||
make_instruction (void)
|
||||
{
|
||||
int i;
|
||||
unsigned int shift;
|
||||
|
||||
for (i = 0; i < currInsn.nargs; i++)
|
||||
for (i = 0; i < cr16_currInsn.nargs; i++)
|
||||
{
|
||||
argument a;
|
||||
|
||||
@ -750,13 +758,13 @@ make_instruction (void)
|
||||
shift = instruction->operands[i].shift;
|
||||
|
||||
make_argument (&a, shift);
|
||||
currInsn.arg[i] = a;
|
||||
cr16_currInsn.arg[i] = a;
|
||||
}
|
||||
|
||||
/* Calculate instruction size (in bytes). */
|
||||
currInsn.size = instruction->size + (size_changed ? 1 : 0);
|
||||
cr16_currInsn.size = instruction->size + (size_changed ? 1 : 0);
|
||||
/* Now in bits. */
|
||||
currInsn.size *= 2;
|
||||
cr16_currInsn.size *= 2;
|
||||
}
|
||||
|
||||
/* Retrieve a single word from a given memory address. */
|
||||
@ -785,10 +793,10 @@ get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
|
||||
bfd_vma mem;
|
||||
|
||||
for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
|
||||
words[i] = get_word_at_PC (mem, info);
|
||||
cr16_words[i] = get_word_at_PC (mem, info);
|
||||
|
||||
allWords =
|
||||
((ULONGLONG) words[0] << 32) + ((unsigned long) words[1] << 16) + words[2];
|
||||
cr16_allWords = ((ULONGLONG) cr16_words[0] << 32)
|
||||
+ ((unsigned long) cr16_words[1] << 16) + cr16_words[2];
|
||||
}
|
||||
|
||||
/* Prints the instruction by calling print_arguments after proper matching. */
|
||||
@ -807,22 +815,22 @@ print_insn_cr16 (bfd_vma memaddr, struct disassemble_info *info)
|
||||
/* Find a matching opcode in table. */
|
||||
is_decoded = match_opcode ();
|
||||
/* If found, print the instruction's mnemonic and arguments. */
|
||||
if (is_decoded > 0 && (words[0] << 16 || words[1]) != 0)
|
||||
if (is_decoded > 0 && (cr16_words[0] << 16 || cr16_words[1]) != 0)
|
||||
{
|
||||
if (strneq (instruction->mnemonic, "cinv", 4))
|
||||
info->fprintf_func (info->stream,"%s", getcinvstring (instruction->mnemonic));
|
||||
else
|
||||
info->fprintf_func (info->stream, "%s", instruction->mnemonic);
|
||||
|
||||
if (((currInsn.nargs = get_number_of_operands ()) != 0)
|
||||
if (((cr16_currInsn.nargs = get_number_of_operands ()) != 0)
|
||||
&& ! (IS_INSN_MNEMONIC ("b")))
|
||||
info->fprintf_func (info->stream, "\t");
|
||||
make_instruction ();
|
||||
/* For push/pop/pushrtn with RA instructions. */
|
||||
if ((INST_HAS_REG_LIST) && ((words[0] >> 7) & 0x1))
|
||||
currInsn.nargs +=1;
|
||||
print_arguments (&currInsn, memaddr, info);
|
||||
return currInsn.size;
|
||||
if ((INST_HAS_REG_LIST) && ((cr16_words[0] >> 7) & 0x1))
|
||||
cr16_currInsn.nargs +=1;
|
||||
print_arguments (&cr16_currInsn, memaddr, info);
|
||||
return cr16_currInsn.size;
|
||||
}
|
||||
|
||||
/* No match found. */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user