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[BFD][AARCH64]Properly truncate no overflow checking relocation value for load/store immediate.

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bfd/ChangeLog:

2018-06-20  Renlin Li  <renlin.li@arm.com>

	* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use PG_OFFSET
	to resolve BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.

ld/ChangeLog:

2018-06-20 Renlin Li  <renlin.li@arm.com>

	* testsuite/ld-aarch64/emit-relocs-115.d: Update test with new value.
	* testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-555.d: Likewise.
This commit is contained in:
Renlin Li 2018-04-27 10:48:18 +01:00
parent fc6141f097
commit b939d8a0de
6 changed files with 29 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
bfd/ChangeLog
View File

@ -1,3 +1,15 @@
2018-06-20 Renlin Li <renlin.li@arm.com>
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use PG_OFFSET
to resolve BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
2018-06-20 Nick Clifton <nickc@redhat.com>
PR 23299

16
bfd/elfxx-aarch64.c
View File

@ -452,26 +452,18 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = value + addend;
break;
@ -521,7 +513,15 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = PG_OFFSET (value + addend);
break;

6
ld/ChangeLog
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@ -1,3 +1,9 @@
2018-06-20 Renlin Li <renlin.li@arm.com>
* testsuite/ld-aarch64/emit-relocs-115.d: Update test with new value.
* testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
* testsuite/ld-aarch64/emit-relocs-555.d: Likewise.
2018-06-19 Maciej W. Rozycki <macro@mips.com>
PR ld/22966

2
ld/testsuite/ld-aarch64/emit-relocs-115.d
View File

@ -6,5 +6,5 @@
00010000 <.text>:
10000: 798019d6 ldrsh x22, \[x14, #12\]
10000: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v2
10004: 79a72a28 ldrsh x8, \[x17, #5012\]
10004: 79872a28 ldrsh x8, \[x17, #916\]
10004: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v3

2
ld/testsuite/ld-aarch64/emit-relocs-534.d
View File

@ -5,5 +5,5 @@
0000000000010000 <.text>:
10000: 798009d6 ldrsh x22, \[x14, #4\]
10000: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC v2
10004: 79a71a28 ldrsh x8, \[x17, #5004\]
10004: 79871a28 ldrsh x8, \[x17, #908\]
10004: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC v3

2
ld/testsuite/ld-aarch64/emit-relocs-555.d
View File

@ -5,5 +5,5 @@
0000000000010000 <.text>:
10000: 798029d6 ldrsh x22, \[x14, #20\]
10000: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v2
10004: 79a73a28 ldrsh x8, \[x17, #5020\]
10004: 79873a28 ldrsh x8, \[x17, #924\]
10004: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v3