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* MAINTAINERS (Write After Approval): Add myself to the list.
This commit is contained in:
Jiong Wang 2013-02-20 07:45:14 +00:00
parent 286cc68d2d
commit b74ea3eb01
2 changed files with 8 additions and 3 deletions
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gdb/ChangeLog
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@ -1,3 +1,7 @@
2013-02-20 Jiong Wang <jiwang@tilera.com>
* MAINTAINERS (Write After Approval): Add myself to the list.
2013-02-19 Pedro Alves <palves@redhat.com> 2013-02-19 Pedro Alves <palves@redhat.com>
Garbage collect 'struct monitor_ops'::load_routine. Garbage collect 'struct monitor_ops'::load_routine.
@ -43,11 +47,11 @@
2013-02-19 Jiong Wang <jiwang@tilera.com> 2013-02-19 Jiong Wang <jiwang@tilera.com>
* tilegx-tdep.c (tilegx_skip_prologue): Use skip_prologue_using_sal. * tilegx-tdep.c (tilegx_skip_prologue): Use skip_prologue_using_sal.
2013-02-19 Jiong Wang <jiwang@tilera.com> 2013-02-19 Jiong Wang <jiwang@tilera.com>
* tilegx-tdep.c (INT_SWINT_1_SIGRETURN): New macro. * tilegx-tdep.c (INT_SWINT_1_SIGRETURN): New macro.
(tilegx_write_pc): New function. (tilegx_write_pc): New function.
(tilegx_cannot_reference_register): Return zero if REGNO (tilegx_cannot_reference_register): Return zero if REGNO
is TILEGX_FAULTNUM_REGNUM. is TILEGX_FAULTNUM_REGNUM.
@ -61,7 +65,7 @@
2013-02-19 Jiong Wang <jiwang@tilera.com> 2013-02-19 Jiong Wang <jiwang@tilera.com>
* tilegx-tdep.c (tilegx_push_dummy_call): args pushed on stack * tilegx-tdep.c (tilegx_push_dummy_call): args pushed on stack
should be aligned to 64bit. should be aligned to 64bit.
2013-02-19 Kai Tietz <ktietz@redhat.com> 2013-02-19 Kai Tietz <ktietz@redhat.com>

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gdb/MAINTAINERS
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@ -638,6 +638,7 @@ D Venkatasubramanian dvenkat@noida.hcltech.com
Corinna Vinschen vinschen@redhat.com Corinna Vinschen vinschen@redhat.com
Sami Wagiaalla swagiaal@redhat.com Sami Wagiaalla swagiaal@redhat.com
Keith Walker keith.walker@arm.com Keith Walker keith.walker@arm.com
Jiong Wang jiwang@tilera.com
Kris Warkentin kewarken@qnx.com Kris Warkentin kewarken@qnx.com
Philippe Waroquiers philippe.waroquiers@skynet.be Philippe Waroquiers philippe.waroquiers@skynet.be
Ulrich Weigand uweigand@de.ibm.com Ulrich Weigand uweigand@de.ibm.com