x86: Update register operand check for AddrPrefixOpReg
When the address size prefix applies to both the memory and the register operand, we need to extract the address size prefix from the register operand if the memory operand has no real registers, like symbol, DISP or symbol(%rip). NB: GCC always generates symbol(%rip) for RIP-relative addressing for both x32 and x86-64. Move the .code16 tests in movdir.s to movdir-16bit to show the correct output from objdump. PR gas/26685 * config/tc-i386.c (process_suffix): Also check the register operand for the address size prefix if the memory operand has no real registers. * testsuite/gas/i386/enqcmd-16bit.d: New file. * testsuite/gas/i386/enqcmd-16bit.s: Likewise. * testsuite/gas/i386/movdir-16bit.d: Likewise. * testsuite/gas/i386/movdir-16bit.s: Likewise. * testsuite/gas/i386/enqcmd.s: Add tests with symbol and DISP. * testsuite/gas/i386/x86-64-enqcmd.s: Likewise. * testsuite/gas/i386/x86-64-movdir.s: Likewise. * testsuite/gas/i386/movdir.s: Add tests with symbol and DISP. Remove the .code16 test. * testsuite/gas/i386/i386.exp: Run movdir-16bit and enqcmd-16bit. * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated. * testsuite/gas/i386/x86-64-enqcmd.d: Likewise. * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise. * testsuite/gas/i386/x86-64-movdir.d: Likewise. * testsuite/gas/i386/enqcmd-intel.d: Likewise. * testsuite/gas/i386/enqcmd.d: Likewise. * testsuite/gas/i386/movdir-intel.d: Likewise. * testsuite/gas/i386/movdir.d: Likewise. * testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise. * testsuite/gas/i386/x86-64-enqcmd.d: Likewise. * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise. * testsuite/gas/i386/x86-64-movdir.d: Likewise.
This commit is contained in:
H.J. Lu
parent
1fa1262d5a
commit
b3a3496f83
@ -1,3 +1,32 @@
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2020-10-03 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/26685
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* config/tc-i386.c (process_suffix): Also check the register
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operand for the address size prefix if the memory operand has
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no real registers.
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* testsuite/gas/i386/enqcmd-16bit.d: New file.
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* testsuite/gas/i386/enqcmd-16bit.s: Likewise.
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* testsuite/gas/i386/movdir-16bit.d: Likewise.
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* testsuite/gas/i386/movdir-16bit.s: Likewise.
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* testsuite/gas/i386/enqcmd.s: Add tests with symbol and DISP.
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* testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
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* testsuite/gas/i386/x86-64-movdir.s: Likewise.
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* testsuite/gas/i386/movdir.s: Add tests with symbol and DISP.
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Remove the .code16 test.
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* testsuite/gas/i386/i386.exp: Run movdir-16bit and enqcmd-16bit.
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* testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
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* testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
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* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
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* testsuite/gas/i386/x86-64-movdir.d: Likewise.
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* testsuite/gas/i386/enqcmd-intel.d: Likewise.
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* testsuite/gas/i386/enqcmd.d: Likewise.
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* testsuite/gas/i386/movdir-intel.d: Likewise.
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* testsuite/gas/i386/movdir.d: Likewise.
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* testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
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* testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
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* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
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* testsuite/gas/i386/x86-64-movdir.d: Likewise.
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2020-10-02 Nick Clifton <nickc@redhat.com>
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* testsuite/gas/arm/mve-vcvtne-it.d: Allow for padding inserted by
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@ -7179,15 +7179,19 @@ process_suffix (void)
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enum { need_word, need_dword, need_qword } need;
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/* Check the register operand for the address size prefix if
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the memory operand is symbol(%rip). */
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the memory operand has no real registers, like symbol, DISP
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or symbol(%rip). */
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if (i.mem_operands == 1
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&& i.reg_operands == 1
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&& i.operands == 2
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&& i.base_reg
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&& i.base_reg->reg_num == RegIP
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&& i.base_reg->reg_type.bitfield.qword
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&& i.types[1].bitfield.class == Reg
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&& i.op[1].regs->reg_type.bitfield.dword
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&& (flag_code == CODE_32BIT
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? i.op[1].regs->reg_type.bitfield.word
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: i.op[1].regs->reg_type.bitfield.dword)
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&& ((i.base_reg == NULL && i.index_reg == NULL)
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|| (i.base_reg
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&& i.base_reg->reg_num == RegIP
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&& i.base_reg->reg_type.bitfield.qword))
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&& !add_prefix (ADDR_PREFIX_OPCODE))
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return 0;
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21
gas/testsuite/gas/i386/enqcmd-16bit.d
Normal file
21
gas/testsuite/gas/i386/enqcmd-16bit.d
Normal file
@ -0,0 +1,21 @@
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#as: -I${srcdir}/$subdir
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#objdump: -dw -Mi8086
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#name: i386 16-bit ENQCMD[S] insns
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.*: +file format .*
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Disassembly of section .text:
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0+ <_start>:
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+[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
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+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
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+[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
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+[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
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+[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
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+[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
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+[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
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+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
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+[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
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+[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
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+[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
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#pass
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4
gas/testsuite/gas/i386/enqcmd-16bit.s
Normal file
4
gas/testsuite/gas/i386/enqcmd-16bit.s
Normal file
@ -0,0 +1,4 @@
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# Check ENQCMD[S] 16-bit instructions
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.code16
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.include "movdir.s"
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@ -8,13 +8,21 @@
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
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[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd ax,\[si\]
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[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
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[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds ax,\[si\]
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[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
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[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd ax,\[si\]
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[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
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[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds ax,\[si\]
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0+ <_start>:
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+[a-f0-9]+: f2 0f 38 f8 01 enqcmd eax,\[ecx\]
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+[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd ax,\[si\]
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+[a-f0-9]+: f3 0f 38 f8 01 enqcmds eax,\[ecx\]
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+[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds ax,\[si\]
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd cx,ds:0x0
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd cx,ds:0x1234
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds cx,ds:0x0
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds cx,ds:0x1234
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+[a-f0-9]+: f2 0f 38 f8 01 enqcmd eax,\[ecx\]
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+[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd ax,\[si\]
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+[a-f0-9]+: f3 0f 38 f8 01 enqcmds eax,\[ecx\]
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+[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds ax,\[si\]
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd cx,ds:0x0
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd cx,ds:0x1234
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds cx,ds:0x0
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds cx,ds:0x1234
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#pass
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@ -8,13 +8,21 @@
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
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[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd \(%si\),%ax
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[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
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[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds \(%si\),%ax
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[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
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[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd \(%si\),%ax
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[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
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[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds \(%si\),%ax
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0+ <_start>:
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+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
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+[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd \(%si\),%ax
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+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
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+[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds \(%si\),%ax
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd 0x0,%cx
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd 0x1234,%cx
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds 0x0,%cx
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds 0x1234,%cx
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+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
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+[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd \(%si\),%ax
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+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
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+[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds \(%si\),%ax
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd 0x0,%cx
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+[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd 0x1234,%cx
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds 0x0,%cx
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+[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds 0x1234,%cx
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#pass
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@ -7,9 +7,17 @@ _start:
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enqcmd (%si),%ax
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enqcmds (%ecx),%eax
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enqcmds (%si),%ax
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enqcmd foo, %cx
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enqcmd 0x1234, %cx
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enqcmds foo, %cx
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enqcmds 0x1234, %cx
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.intel_syntax noprefix
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enqcmd eax,[ecx]
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enqcmd ax,[si]
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enqcmds eax,[ecx]
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enqcmds ax,[si]
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enqcmd cx,ds:foo
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enqcmd cx,ds:0x1234
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enqcmds cx,ds:foo
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enqcmds cx,ds:0x1234
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@ -484,9 +484,11 @@ if [gas_32_check] then {
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run_dump_test "cldemote-intel"
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run_dump_test "movdir"
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run_dump_test "movdir-intel"
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run_dump_test "movdir-16bit"
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run_list_test "movdir64b-reg"
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run_dump_test "enqcmd"
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run_dump_test "enqcmd-intel"
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run_dump_test "enqcmd-16bit"
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run_list_test "enqcmd-inval"
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run_dump_test "serialize"
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run_dump_test "tdx"
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21
gas/testsuite/gas/i386/movdir-16bit.d
Normal file
21
gas/testsuite/gas/i386/movdir-16bit.d
Normal file
@ -0,0 +1,21 @@
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#as: -I${srcdir}/$subdir
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#objdump: -dw -Mi8086
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#name: i386 16-bit MOVDIR[I,64B] insns
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.*: +file format .*
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Disassembly of section .text:
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0+ <_start>:
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+[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
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+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
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+[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
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+[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
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+[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
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+[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
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+[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
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+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
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+[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
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+[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
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+[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
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#pass
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4
gas/testsuite/gas/i386/movdir-16bit.s
Normal file
4
gas/testsuite/gas/i386/movdir-16bit.s
Normal file
@ -0,0 +1,4 @@
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# Check MOVDIR[I,64B] 16-bit instructions
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.code16
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.include "movdir.s"
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@ -8,19 +8,16 @@
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
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[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri DWORD PTR \[bx\+di\],eax
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b ax,\[bx\+di\]
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 67[ ]*movdir64b eax,\[edi\+eiz\*2\]
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
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[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri DWORD PTR \[bx\+di\],eax
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b ax,\[bx\+di\]
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 90[ ]*movdir64b eax,\[eax\+edx\*4\]
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0+ <_start>:
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+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
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+[a-f0-9]+: 66 0f 38 f8 01 movdir64b eax,\[ecx\]
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+[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b ax,\[si\]
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+[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b cx,ds:0x0
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+[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b cx,ds:0x1234
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+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
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+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
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+[a-f0-9]+: 66 0f 38 f8 01 movdir64b eax,\[ecx\]
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+[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b ax,\[si\]
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+[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b cx,ds:0x0
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+[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b cx,ds:0x1234
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#pass
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@ -8,19 +8,16 @@
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
|
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
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[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri %eax,\(%bx,%di\)
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%bx,%di\),%ax
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 67[ ]*movdir64b \(%edi,%eiz,2\),%eax
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[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
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[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri %eax,\(%bx,%di\)
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[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%bx,%di\),%ax
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[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 90[ ]*movdir64b \(%eax,%edx,4\),%eax
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0+ <_start>:
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+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
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+[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b \(%si\),%ax
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
|
||||
+[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b \(%si\),%ax
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
|
||||
#pass
|
||||
|
||||
@ -3,19 +3,16 @@
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
.rept 2
|
||||
movdiri %eax, (%ecx)
|
||||
movdir64b (%ecx),%eax
|
||||
movdir64b (%si),%ax
|
||||
movdir64b foo, %cx
|
||||
movdir64b 0x1234, %cx
|
||||
|
||||
.intel_syntax noprefix
|
||||
movdiri [ecx], eax
|
||||
movdiri dword ptr [ecx], eax
|
||||
movdir64b eax,[ecx]
|
||||
movdir64b ax,[si]
|
||||
|
||||
.att_syntax prefix
|
||||
.code16
|
||||
.endr
|
||||
|
||||
nop
|
||||
movdir64b cx,ds:foo
|
||||
movdir64b cx,ds:0x1234
|
||||
|
||||
@ -19,6 +19,10 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds ecx,\[eiz\*1\+0x12345678\]
|
||||
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd rax,\[rcx\]
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd eax,\[ecx\]
|
||||
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds rax,\[rcx\]
|
||||
@ -29,4 +33,8 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds ecx,\[eiz\*1\+0x12345678\]
|
||||
#pass
|
||||
|
||||
@ -19,6 +19,10 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
|
||||
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
|
||||
@ -29,4 +33,8 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
|
||||
#pass
|
||||
|
||||
@ -13,6 +13,10 @@ _start:
|
||||
enqcmds foo(%rip),%rcx
|
||||
enqcmds foo(%rip),%ecx
|
||||
enqcmds foo(%eip),%ecx
|
||||
enqcmd foo, %ecx
|
||||
enqcmd 0x12345678, %ecx
|
||||
enqcmds foo, %ecx
|
||||
enqcmds 0x12345678, %ecx
|
||||
|
||||
.intel_syntax noprefix
|
||||
enqcmd rax,[rcx]
|
||||
@ -25,3 +29,7 @@ _start:
|
||||
enqcmds rcx,[rip+foo]
|
||||
enqcmds ecx,[rip+foo]
|
||||
enqcmds ecx,[eip+foo]
|
||||
enqcmd ecx,ds:foo
|
||||
enqcmd ecx,ds:0x12345678
|
||||
enqcmds ecx,ds:foo
|
||||
enqcmds ecx,ds:0x12345678
|
||||
|
||||
@ -15,6 +15,8 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
|
||||
@ -24,4 +26,6 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
|
||||
#pass
|
||||
|
||||
@ -15,6 +15,8 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
|
||||
@ -24,4 +26,6 @@ Disassembly of section \.text:
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
|
||||
#pass
|
||||
|
||||
@ -9,6 +9,8 @@ _start:
|
||||
movdir64b foo(%rip),%rcx
|
||||
movdir64b foo(%rip),%ecx
|
||||
movdir64b foo(%eip),%ecx
|
||||
movdir64b foo, %ecx
|
||||
movdir64b 0x12345678, %ecx
|
||||
|
||||
.intel_syntax noprefix
|
||||
movdiri [rcx],eax
|
||||
@ -20,3 +22,5 @@ _start:
|
||||
movdir64b rcx,[rip+foo]
|
||||
movdir64b ecx,[rip+foo]
|
||||
movdir64b ecx,[eip+foo]
|
||||
movdir64b ecx,ds:foo
|
||||
movdir64b ecx,ds:0x12345678
|
||||
|
||||
Loading…
Reference in New Issue
Block a user