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* config/tc-mips.c (mips_cl_insn): Replace the valid_p, delay_slot_p

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and extended_p fields with a single fixed_p field.
	(append_insn, mips_no_prev_insn): Adjust accordingly.
This commit is contained in:
Richard Sandiford 2005-03-09 09:14:20 +00:00
parent 2fa1597374
commit a38419a54c
2 changed files with 19 additions and 40 deletions
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6
gas/ChangeLog
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@ -1,3 +1,9 @@
2005-03-09 Richard Sandiford <rsandifo@redhat.com>
* config/tc-mips.c (mips_cl_insn): Replace the valid_p, delay_slot_p
and extended_p fields with a single fixed_p field.
(append_insn, mips_no_prev_insn): Adjust accordingly.
2005-03-09 Richard Sandiford <rsandifo@redhat.com> 2005-03-09 Richard Sandiford <rsandifo@redhat.com>
* config/tc-mips.c (mips_cl_insn): Replace reloc_type array with * config/tc-mips.c (mips_cl_insn): Replace reloc_type array with

53
gas/config/tc-mips.c
View File

@ -146,19 +146,12 @@ struct mips_cl_insn
/* The relocs associated with the instruction, if any. */ /* The relocs associated with the instruction, if any. */
fixS *fixp[3]; fixS *fixp[3];
/* True if this entry describes a real instruction. */ /* True if this entry cannot be moved from its current position. */
unsigned int valid_p : 1; unsigned int fixed_p : 1;
/* True if this instruction occured in a .set noreorder block. */ /* True if this instruction occured in a .set noreorder block. */
unsigned int noreorder_p : 1; unsigned int noreorder_p : 1;
/* True if this instruction corresponds to an assembler-filled
delay slot. Always false if noreorder_p. */
unsigned int delay_slot_p : 1;
/* True for extended mips16 instructions. */
unsigned int extended_p : 1;
/* True for mips16 instructions that jump to an absolute address. */ /* True for mips16 instructions that jump to an absolute address. */
unsigned int mips16_absolute_jump_p : 1; unsigned int mips16_absolute_jump_p : 1;
}; };
@ -2357,12 +2350,9 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
/* If we had to emit any NOP instructions, then we /* If we had to emit any NOP instructions, then we
already know we can not swap. */ already know we can not swap. */
|| nops != 0 || nops != 0
/* If we don't even know the previous insn, we can not /* We can't swap if the previous instruction's position
swap. */ is fixed. */
|| ! history[0].valid_p || history[0].fixed_p
/* If the previous insn is already in a branch delay
slot, then we can not swap. */
|| history[0].delay_slot_p
/* If the previous previous insn was in a .set /* If the previous previous insn was in a .set
noreorder, we can't swap. Actually, the MIPS noreorder, we can't swap. Actually, the MIPS
assembler will swap in this situation. However, gcc assembler will swap in this situation. However, gcc
@ -2374,11 +2364,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
bne $4,$0,foo bne $4,$0,foo
in which we can not swap the bne and INSN. If gcc is in which we can not swap the bne and INSN. If gcc is
not configured -with-gnu-as, it does not output the not configured -with-gnu-as, it does not output the
.set pseudo-ops. We don't have to check .set pseudo-ops. */
history[0].noreorder_p, because history[0].valid_p will
be 0 in that case. We don't want to use
history[1].valid_p, because we do want to be able
to swap at the start of a function. */
|| history[1].noreorder_p || history[1].noreorder_p
/* If the branch is itself the target of a branch, we /* If the branch is itself the target of a branch, we
can not swap. We cheat on this; all we check for is can not swap. We cheat on this; all we check for is
@ -2542,9 +2528,6 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
swap. */ swap. */
|| (mips_opts.mips16 || (mips_opts.mips16
&& (prev_pinfo & MIPS16_INSN_READ_PC)) && (prev_pinfo & MIPS16_INSN_READ_PC))
/* If the previous instruction was extended, we can not
swap. */
|| (mips_opts.mips16 && history[0].extended_p)
/* If the previous instruction had a fixup in mips16 /* If the previous instruction had a fixup in mips16
mode, we can not swap. This normally means that the mode, we can not swap. This normally means that the
previous instruction was a 4 byte branch anyhow. */ previous instruction was a 4 byte branch anyhow. */
@ -2700,7 +2683,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
history[1].extend = ip->extend; history[1].extend = ip->extend;
history[1].insn_opcode = ip->insn_opcode; history[1].insn_opcode = ip->insn_opcode;
} }
history[0].delay_slot_p = 1; history[0].fixed_p = 1;
/* If that was an unconditional branch, forget the previous /* If that was an unconditional branch, forget the previous
insn information. */ insn information. */
@ -2714,7 +2697,6 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
history[0].fixp[1] = NULL; history[0].fixp[1] = NULL;
history[0].fixp[2] = NULL; history[0].fixp[2] = NULL;
history[0].mips16_absolute_jump_p = 0; history[0].mips16_absolute_jump_p = 0;
history[0].extended_p = 0;
} }
else if (pinfo & INSN_COND_BRANCH_LIKELY) else if (pinfo & INSN_COND_BRANCH_LIKELY)
{ {
@ -2733,8 +2715,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
history[0].fixp[1] = NULL; history[0].fixp[1] = NULL;
history[0].fixp[2] = NULL; history[0].fixp[2] = NULL;
history[0].mips16_absolute_jump_p = 0; history[0].mips16_absolute_jump_p = 0;
history[0].extended_p = 0; history[0].fixed_p = 1;
history[0].delay_slot_p = 1;
} }
else else
{ {
@ -2752,27 +2733,20 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
history[0].use_extend = ip->use_extend; history[0].use_extend = ip->use_extend;
history[0].extend = ip->extend; history[0].extend = ip->extend;
history[0].insn_opcode = ip->insn_opcode; history[0].insn_opcode = ip->insn_opcode;
history[0].fixed_p = (mips_opts.mips16
/* Any time we see a branch, we always fill the delay slot && (ip->use_extend
immediately; since this insn is not a branch, we know it || *reloc_type > BFD_RELOC_UNUSED));
is not in a delay slot. */
history[0].delay_slot_p = 0;
history[0].fixp[0] = fixp[0]; history[0].fixp[0] = fixp[0];
history[0].fixp[1] = fixp[1]; history[0].fixp[1] = fixp[1];
history[0].fixp[2] = fixp[2]; history[0].fixp[2] = fixp[2];
history[0].mips16_absolute_jump_p = (reloc_type[0] history[0].mips16_absolute_jump_p = (reloc_type[0]
== BFD_RELOC_MIPS16_JMP); == BFD_RELOC_MIPS16_JMP);
if (mips_opts.mips16)
history[0].extended_p = (ip->use_extend
|| *reloc_type > BFD_RELOC_UNUSED);
} }
history[1].noreorder_p = history[0].noreorder_p; history[1].noreorder_p = history[0].noreorder_p;
history[0].noreorder_p = 0; history[0].noreorder_p = 0;
history[0].frag = frag_now; history[0].frag = frag_now;
history[0].where = f - frag_now->fr_literal; history[0].where = f - frag_now->fr_literal;
history[0].valid_p = 1;
} }
else if (mips_relax.sequence != 2) else if (mips_relax.sequence != 2)
{ {
@ -2791,6 +2765,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
== BFD_RELOC_MIPS16_JMP); == BFD_RELOC_MIPS16_JMP);
history[1].noreorder_p = history[0].noreorder_p; history[1].noreorder_p = history[0].noreorder_p;
history[0].noreorder_p = 1; history[0].noreorder_p = 1;
history[0].fixed_p = 1;
} }
/* We just output an insn, so the next one doesn't have a label. */ /* We just output an insn, so the next one doesn't have a label. */
@ -2813,10 +2788,8 @@ mips_no_prev_insn (int preserve)
prev_nop_frag_required = 0; prev_nop_frag_required = 0;
prev_nop_frag_since = 0; prev_nop_frag_since = 0;
} }
history[0].valid_p = 0; history[0].fixed_p = 1;
history[0].delay_slot_p = 0;
history[0].noreorder_p = 0; history[0].noreorder_p = 0;
history[0].extended_p = 0;
history[0].mips16_absolute_jump_p = 0; history[0].mips16_absolute_jump_p = 0;
history[1].noreorder_p = 0; history[1].noreorder_p = 0;
mips_clear_insn_labels (); mips_clear_insn_labels ();