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mep: ubsan: mep-ibld.c:1635,1645,1652 left shift of negative value

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cpu/
	* mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
	value by two rather than shifting left.
	(f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
opcodes/
	* mep-ibld.c: Regenerate.
This commit is contained in:
Alan Modra 2020-09-01 07:48:02 +09:30
parent 821e059c26
commit 8dbe96f070
4 changed files with 20 additions and 10 deletions
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6
cpu/ChangeLog
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@ -1,3 +1,9 @@
2020-09-01 Alan Modra <amodra@gmail.com>
* mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
value by two rather than shifting left.
(f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
2020-08-26 David Faust <david.faust@oracle.com> 2020-08-26 David Faust <david.faust@oracle.com>
* bpf.cpu (arch bpf): Add xbpf mach and isas. * bpf.cpu (arch bpf): Add xbpf mach and isas.

10
cpu/mep-core.cpu
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@ -430,15 +430,15 @@
(df f-8s8a2 "pc-rel addr (8 bits)" (all-mep-core-isas PCREL-ADDR) 8 7 INT (df f-8s8a2 "pc-rel addr (8 bits)" (all-mep-core-isas PCREL-ADDR) 8 7 INT
((value pc) (sra SI (sub SI value pc) 1)) ((value pc) (sra SI (sub SI value pc) 1))
((value pc) (add SI (sll SI value 1) pc))) ((value pc) (add SI (mul SI value 2) pc)))
(df f-12s4a2 "pc-rel addr (12 bits)" (all-mep-core-isas PCREL-ADDR) 4 11 INT (df f-12s4a2 "pc-rel addr (12 bits)" (all-mep-core-isas PCREL-ADDR) 4 11 INT
((value pc) (sra SI (sub SI value pc) 1)) ((value pc) (sra SI (sub SI value pc) 1))
((value pc) (add SI (sll SI value 1) pc))) ((value pc) (add SI (mul SI value 2) pc)))
(df f-17s16a2 "pc-rel addr (17 bits)" (all-mep-core-isas PCREL-ADDR) 16 16 INT (df f-17s16a2 "pc-rel addr (17 bits)" (all-mep-core-isas PCREL-ADDR) 16 16 INT
((value pc) (sra SI (sub SI value pc) 1)) ((value pc) (sra SI (sub SI value pc) 1))
((value pc) (add SI (sll SI value 1) pc))) ((value pc) (add SI (mul SI value 2) pc)))
(df f-24s5a2n-hi "24s5a2n hi 16s16" (all-mep-core-isas PCREL-ADDR) 16 16 INT #f #f) (df f-24s5a2n-hi "24s5a2n hi 16s16" (all-mep-core-isas PCREL-ADDR) 16 16 INT #f #f)
(df f-24s5a2n-lo "24s5a2n lo 7s5a2" (all-mep-core-isas PCREL-ADDR) 5 7 UINT #f #f) (df f-24s5a2n-lo "24s5a2n lo 7s5a2" (all-mep-core-isas PCREL-ADDR) 5 7 UINT #f #f)
@ -456,7 +456,7 @@
(set (ifield f-24s5a2n-hi) (set (ifield f-24s5a2n-hi)
(sra INT (ifield f-24s5a2n) 8)))) (sra INT (ifield f-24s5a2n) 8))))
(extract (set (ifield f-24s5a2n) (extract (set (ifield f-24s5a2n)
(add SI (or (sll (ifield f-24s5a2n-hi) 8) (add SI (or (mul (ifield f-24s5a2n-hi) 256)
(sll (ifield f-24s5a2n-lo) 1)) (sll (ifield f-24s5a2n-lo) 1))
pc))) pc)))
) )
@ -486,7 +486,7 @@
(df f-7u9 "tp-rel b (7 bits)" (all-mep-core-isas) 9 7 UINT #f #f) (df f-7u9 "tp-rel b (7 bits)" (all-mep-core-isas) 9 7 UINT #f #f)
(df f-7u9a2 "tp-rel h (7 bits)" (all-mep-core-isas) 9 6 UINT (df f-7u9a2 "tp-rel h (7 bits)" (all-mep-core-isas) 9 6 UINT
((value pc) (srl SI value 1)) ((value pc) (srl SI value 1))
((value pc) (sll SI value 1))) ((value pc) (mul SI value 2)))
(df f-7u9a4 "tp/sp-rel w (7 bits)" (all-mep-core-isas) 9 5 UINT (df f-7u9a4 "tp/sp-rel w (7 bits)" (all-mep-core-isas) 9 5 UINT
((value pc) (srl SI value 2)) ((value pc) (srl SI value 2))
((value pc) (sll SI value 2))) ((value pc) (sll SI value 2)))

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2020-09-01 Alan Modra <amodra@gmail.com>
* mep-ibld.c: Regenerate.
2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com> 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
* csky-dis.c (csky_output_operand): Assign dis_info.value for * csky-dis.c (csky_output_operand): Assign dis_info.value for

10
opcodes/mep-ibld.c
View File

@ -1624,7 +1624,7 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
{ {
long value; long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value); length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value);
value = ((((value) << (1))) + (pc)); value = ((((value) * (2))) + (pc));
fields->f_12s4a2 = value; fields->f_12s4a2 = value;
} }
break; break;
@ -1632,7 +1632,7 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
{ {
long value; long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, pc, & value); length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, pc, & value);
value = ((((value) << (1))) + (pc)); value = ((((value) * (2))) + (pc));
fields->f_17s16a2 = value; fields->f_17s16a2 = value;
} }
break; break;
@ -1642,14 +1642,14 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
if (length <= 0) break; if (length <= 0) break;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 7, 32, total_length, pc, & fields->f_24s5a2n_lo); length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 7, 32, total_length, pc, & fields->f_24s5a2n_lo);
if (length <= 0) break; if (length <= 0) break;
FLD (f_24s5a2n) = ((((((FLD (f_24s5a2n_hi)) << (8))) | (((FLD (f_24s5a2n_lo)) << (1))))) + (pc)); FLD (f_24s5a2n) = ((((((FLD (f_24s5a2n_hi)) * (256))) | (((FLD (f_24s5a2n_lo)) << (1))))) + (pc));
} }
break; break;
case MEP_OPERAND_PCREL8A2 : case MEP_OPERAND_PCREL8A2 :
{ {
long value; long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 7, 32, total_length, pc, & value); length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 7, 32, total_length, pc, & value);
value = ((((value) << (1))) + (pc)); value = ((((value) * (2))) + (pc));
fields->f_8s8a2 = value; fields->f_8s8a2 = value;
} }
break; break;
@ -1765,7 +1765,7 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
{ {
long value; long value;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 6, 32, total_length, pc, & value); length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 6, 32, total_length, pc, & value);
value = ((value) << (1)); value = ((value) * (2));
fields->f_7u9a2 = value; fields->f_7u9a2 = value;
} }
break; break;