ubsan: bpf: left shift cannot be represented in type 'DI' (aka 'long')
cpu/ * bpf.cpu (f-imm64): Avoid signed overflow. opcodes/ * bpf-ibld.c: Regenerate.
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@ -1,3 +1,7 @@
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2019-12-17 Alan Modra <amodra@gmail.com>
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* bpf.cpu (f-imm64): Avoid signed overflow.
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2019-12-16 Alan Modra <amodra@gmail.com>
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* xstormy16.cpu (f-rel12a): Avoid signed overflow.
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@ -288,8 +288,8 @@
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(set (ifield f-imm64-a) (and (ifield f-imm64) (const #xffffffff)))))
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(extract (sequence ()
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(set (ifield f-imm64)
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(or (sll DI (zext DI (ifield f-imm64-c)) (const 32))
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(zext DI (ifield f-imm64-a)))))))
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(or (sll UDI (zext UDI (ifield f-imm64-c)) (const 32))
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(zext UDI (ifield f-imm64-a)))))))
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;;; Operands
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@ -1,3 +1,7 @@
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2019-12-17 Alan Modra <amodra@gmail.com>
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* bpf-ibld.c: Regenerate.
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2019-12-16 Alan Modra <amodra@gmail.com>
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* aarch64-dis.c (sign_extend): Return uint64_t. Rewrite without
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@ -689,7 +689,7 @@ bpf_cgen_extract_operand (CGEN_CPU_DESC cd,
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length = extract_normal (cd, ex_info, insn_value, 0, 96, 31, 32, 32, total_length, pc, & fields->f_imm64_c);
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if (length <= 0) break;
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{
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FLD (f_imm64) = ((((((DI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((DI) (UINT) (FLD (f_imm64_a)))));
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FLD (f_imm64) = ((((((UDI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((UDI) (UINT) (FLD (f_imm64_a)))));
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}
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}
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break;
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