Mon Nov 9 18:22:55 1998 Dave Brolley <brolley@cygnus.com>
* po/opcodes.pot: Regenerate. * po/POTFILES.in: Regenerate. * fr30-opc.c: Regenerate. * fr30-opc.h: Regenerate.
This commit is contained in:
Dave Brolley
parent
69c4fd86f9
commit
6146431a2e
@ -1,3 +1,10 @@
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Mon Nov 9 18:22:55 1998 Dave Brolley <brolley@cygnus.com>
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* po/opcodes.pot: Regenerate.
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* po/POTFILES.in: Regenerate.
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* fr30-opc.c: Regenerate.
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* fr30-opc.h: Regenerate.
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Fri Nov 6 17:21:38 1998 Doug Evans <devans@canuck.cygnus.com>
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* m32r-asm.c: Regenerate.
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@ -277,6 +277,7 @@ static const CGEN_ATTR_ENTRY MACH_attr[] =
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const CGEN_ATTR_TABLE fr30_cgen_hardware_attr_table[] =
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{
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{ "CACHE-ADDR", NULL },
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{ "FUN-ACCESS", NULL },
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{ "PC", NULL },
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{ "PROFILE", NULL },
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{ 0, 0 }
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@ -336,6 +337,44 @@ CGEN_KEYWORD fr30_cgen_opval_h_gr =
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19
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};
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CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_dr_entries[] =
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{
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{ "tbr", 0 },
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{ "rp", 1 },
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{ "ssp", 2 },
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{ "usp", 3 }
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};
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CGEN_KEYWORD fr30_cgen_opval_h_dr =
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{
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& fr30_cgen_opval_h_dr_entries[0],
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4
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};
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CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_mdr_entries[] =
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{
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{ "mdh", 4 },
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{ "mdl", 5 }
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};
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CGEN_KEYWORD fr30_cgen_opval_h_mdr =
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{
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& fr30_cgen_opval_h_mdr_entries[0],
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2
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};
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CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_cr_entries[] =
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{
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{ "pc", 0 },
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{ "ps", 1 }
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};
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CGEN_KEYWORD fr30_cgen_opval_h_cr =
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{
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& fr30_cgen_opval_h_cr_entries[0],
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2
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};
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/* The hardware table. */
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@ -349,6 +388,13 @@ static const CGEN_HW_ENTRY fr30_cgen_hw_entries[] =
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{ HW_H_ADDR, & HW_ENT (HW_H_ADDR + 1), "h-addr", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ HW_H_IADDR, & HW_ENT (HW_H_IADDR + 1), "h-iaddr", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ HW_H_GR, & HW_ENT (HW_H_GR + 1), "h-gr", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_gr, { 0, 0|(1<<CGEN_HW_CACHE_ADDR)|(1<<CGEN_HW_PROFILE), { 0 } } },
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{ HW_H_DR, & HW_ENT (HW_H_DR + 1), "h-dr", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_dr, { 0, 0, { 0 } } },
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{ HW_H_MDR, & HW_ENT (HW_H_MDR + 1), "h-mdr", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_mdr, { 0, 0, { 0 } } },
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{ HW_H_CR, & HW_ENT (HW_H_CR + 1), "h-cr", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_cr, { 0, 0, { 0 } } },
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{ HW_H_NBIT, & HW_ENT (HW_H_NBIT + 1), "h-nbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0|(1<<CGEN_HW_FUN_ACCESS), { 0 } } },
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{ HW_H_ZBIT, & HW_ENT (HW_H_ZBIT + 1), "h-zbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0|(1<<CGEN_HW_FUN_ACCESS), { 0 } } },
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{ HW_H_VBIT, & HW_ENT (HW_H_VBIT + 1), "h-vbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0|(1<<CGEN_HW_FUN_ACCESS), { 0 } } },
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{ HW_H_CBIT, & HW_ENT (HW_H_CBIT + 1), "h-cbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0|(1<<CGEN_HW_FUN_ACCESS), { 0 } } },
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{ 0 }
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};
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@ -368,6 +414,18 @@ const CGEN_OPERAND fr30_cgen_operand_table[MAX_OPERANDS] =
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/* Rj: source register */
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{ "Rj", & HW_ENT (HW_H_GR), 8, 4,
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{ 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
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/* nbit: negative bit */
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{ "nbit", & HW_ENT (HW_H_NBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_FAKE), { 0 } } },
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/* vbit: overflow bit */
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{ "vbit", & HW_ENT (HW_H_VBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_FAKE), { 0 } } },
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/* zbit: zero bit */
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{ "zbit", & HW_ENT (HW_H_ZBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_FAKE), { 0 } } },
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/* cbit: carry bit */
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{ "cbit", & HW_ENT (HW_H_CBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_FAKE), { 0 } } },
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};
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/* Operand references. */
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@ -375,10 +433,14 @@ const CGEN_OPERAND fr30_cgen_operand_table[MAX_OPERANDS] =
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#define INPUT CGEN_OPERAND_INSTANCE_INPUT
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#define OUTPUT CGEN_OPERAND_INSTANCE_OUTPUT
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static const CGEN_OPERAND_INSTANCE fmt_ADD_ops[] = {
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static const CGEN_OPERAND_INSTANCE fmt_add_ops[] = {
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{ INPUT, "Rj", & HW_ENT (HW_H_GR), CGEN_MODE_SI, & OP_ENT (RJ), 0 },
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{ INPUT, "Ri", & HW_ENT (HW_H_GR), CGEN_MODE_SI, & OP_ENT (RI), 0 },
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{ OUTPUT, "Ri", & HW_ENT (HW_H_GR), CGEN_MODE_SI, & OP_ENT (RI), 0 },
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{ OUTPUT, "vbit", & HW_ENT (HW_H_VBIT), CGEN_MODE_BI, 0, 0 },
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{ OUTPUT, "cbit", & HW_ENT (HW_H_CBIT), CGEN_MODE_BI, 0, 0 },
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{ OUTPUT, "zbit", & HW_ENT (HW_H_ZBIT), CGEN_MODE_BI, 0, 0 },
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{ OUTPUT, "nbit", & HW_ENT (HW_H_NBIT), CGEN_MODE_BI, 0, 0 },
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{ 0 }
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};
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@ -399,13 +461,13 @@ const CGEN_INSN fr30_cgen_insn_table_entries[MAX_INSNS] =
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A `num' value of zero is thus invalid.
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Also, the special `invalid' insn resides here. */
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{ { 0 }, 0 },
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/* ADD $Rj,$Ri */
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/* add $Rj,$Ri */
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{
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{ 1, 1, 1, 1 },
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FR30_INSN_ADD, "ADD", "ADD",
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FR30_INSN_ADD, "add", "add",
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{ { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
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{ 16, 16, 0xff00 }, 0xa600,
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(PTR) & fmt_ADD_ops[0],
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(PTR) & fmt_add_ops[0],
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{ 0, 0, { 0 } }
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},
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};
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@ -94,9 +94,25 @@ typedef enum h_gr {
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, H_GR_R13 = 13, H_GR_R14 = 14, H_GR_R15 = 15
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} H_GR;
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/* Enum declaration for dedicated registers. */
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typedef enum h_dr {
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H_DR_TBR, H_DR_RP, H_DR_SSP, H_DR_USP
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} H_DR;
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/* Enum declaration for multiplication and division registers. */
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typedef enum h_mdr {
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H_MDR_MDH = 4, H_MDR_MDL = 5
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} H_MDR;
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/* Enum declaration for control registers. */
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typedef enum h_cr {
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H_CR_PC, H_CR_PS
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} H_CR;
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/* Enum declaration for fr30 operand types. */
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typedef enum cgen_operand_type {
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FR30_OPERAND_PC, FR30_OPERAND_RI, FR30_OPERAND_RJ, FR30_OPERAND_MAX
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FR30_OPERAND_PC, FR30_OPERAND_RI, FR30_OPERAND_RJ, FR30_OPERAND_NBIT
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, FR30_OPERAND_VBIT, FR30_OPERAND_ZBIT, FR30_OPERAND_CBIT, FR30_OPERAND_MAX
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} CGEN_OPERAND_TYPE;
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/* Non-boolean attributes. */
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@ -113,13 +129,13 @@ typedef enum mach_attr {
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#define MAX_OPERANDS ((int) FR30_OPERAND_MAX)
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/* Maximum number of operands referenced by any insn. */
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#define MAX_OPERAND_INSTANCES 3
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#define MAX_OPERAND_INSTANCES 7
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/* Hardware, operand and instruction attribute indices. */
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/* Enum declaration for cgen_hw attrs. */
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typedef enum cgen_hw_attr {
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CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
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CGEN_HW_CACHE_ADDR, CGEN_HW_FUN_ACCESS, CGEN_HW_PC, CGEN_HW_PROFILE
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} CGEN_HW_ATTR;
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/* Number of non-boolean elements in cgen_hw. */
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@ -188,7 +204,9 @@ extern const CGEN_ATTR_TABLE fr30_cgen_insn_attr_table[];
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/* Enum declaration for fr30 hardware types. */
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typedef enum hw_type {
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HW_H_PC, HW_H_MEMORY, HW_H_SINT, HW_H_UINT
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, HW_H_ADDR, HW_H_IADDR, HW_H_GR, HW_MAX
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, HW_H_ADDR, HW_H_IADDR, HW_H_GR, HW_H_DR
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, HW_H_MDR, HW_H_CR, HW_H_NBIT, HW_H_ZBIT
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, HW_H_VBIT, HW_H_CBIT, HW_MAX
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} HW_TYPE;
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#define MAX_HW ((int) HW_MAX)
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@ -196,6 +214,9 @@ typedef enum hw_type {
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/* Hardware decls. */
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extern CGEN_KEYWORD fr30_cgen_opval_h_gr;
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extern CGEN_KEYWORD fr30_cgen_opval_h_dr;
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extern CGEN_KEYWORD fr30_cgen_opval_h_mdr;
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extern CGEN_KEYWORD fr30_cgen_opval_h_cr;
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#define CGEN_INIT_PARSE(od) \
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{\
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