x86: drop seg_entry
Use struct reg_entry instead for most purposes, with a separate array holding just the respective opcode prefix bytes.
This commit is contained in:
Jan Beulich
parent
3468486226
commit
5e0423804a
@ -1,3 +1,18 @@
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2021-03-30 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (build_modrm_byte): Change return type.
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Change type of "default_seg". Use NULL. Adjust setting of
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"default_seg".
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(reg_ds, reg_es, reg_ss): New.
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(struct _i386_insn): Change type of seg[].
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(md_begin): Initialize reg_ds, reg_es, and reg_ss.
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(swap_operands): Change type of "temp_seg".
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(check_string): Adjust %es check.
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(process_operands): Change type of "default_seg". Use NULL.
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Adjust segment override processing..
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(i386_att_operand): Adjust segment override handling.
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* config/tc-i386-intel.c (i386_intel_operand): Likewise.
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2021-03-30 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (reg_eax): New.
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@ -1028,16 +1028,10 @@ i386_intel_operand (char *operand_string, int got_a_float)
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as_warn (_("redundant segment overrides"));
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break;
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}
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switch (i386_regtab[expP->X_add_number].reg_num)
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{
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case 0: i.seg[i.mem_operands] = &es; break;
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case 1: i.seg[i.mem_operands] = &cs; break;
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case 2: i.seg[i.mem_operands] = &ss; break;
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case 3: i.seg[i.mem_operands] = &ds; break;
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case 4: i.seg[i.mem_operands] = &fs; break;
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case 5: i.seg[i.mem_operands] = &gs; break;
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case RegFlat: i.seg[i.mem_operands] = NULL; break;
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}
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if (i386_regtab[expP->X_add_number].reg_num == RegFlat)
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i.seg[i.mem_operands] = NULL;
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else
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i.seg[i.mem_operands] = &i386_regtab[expP->X_add_number];
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}
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if (!i386_index_check (operand_string))
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@ -190,7 +190,7 @@ static int check_qword_reg (void);
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static int check_word_reg (void);
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static int finalize_imm (void);
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static int process_operands (void);
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static const seg_entry *build_modrm_byte (void);
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static const reg_entry *build_modrm_byte (void);
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static void output_insn (void);
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static void output_imm (fragS *, offsetT);
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static void output_disp (fragS *, offsetT);
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@ -215,6 +215,9 @@ static const reg_entry bad_reg = { "<bad>", OPERAND_TYPE_NONE, 0, 0,
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{ Dw2Inval, Dw2Inval } };
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static const reg_entry *reg_eax;
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static const reg_entry *reg_ds;
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static const reg_entry *reg_es;
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static const reg_entry *reg_ss;
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static const reg_entry *reg_st0;
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static const reg_entry *reg_k0;
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@ -308,7 +311,7 @@ struct _i386_insn
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/* SEG gives the seg_entries of this insn. They are zero unless
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explicit segment overrides are given. */
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const seg_entry *seg[2];
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const reg_entry *seg[2];
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/* Copied first memory operand string, for re-checking. */
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char *memop1_string;
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@ -3107,6 +3110,15 @@ md_begin (void)
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}
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break;
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case SReg:
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switch (regtab->reg_num)
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{
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case 0: reg_es = regtab; break;
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case 2: reg_ss = regtab; break;
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case 3: reg_ds = regtab; break;
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}
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break;
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case RegMask:
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if (!regtab->reg_num)
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reg_k0 = regtab;
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@ -5522,7 +5534,7 @@ swap_operands (void)
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if (i.mem_operands == 2)
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{
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const seg_entry *temp_seg;
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const reg_entry *temp_seg;
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temp_seg = i.seg[0];
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i.seg[0] = i.seg[1];
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i.seg[1] = temp_seg;
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@ -6752,7 +6764,7 @@ check_string (void)
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unsigned int es_op = i.tm.opcode_modifier.isstring - IS_STRING_ES_OP0;
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unsigned int op = i.tm.operand_types[0].bitfield.baseindex ? es_op : 0;
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if (i.seg[op] != NULL && i.seg[op] != &es)
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if (i.seg[op] != NULL && i.seg[op] != reg_es)
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{
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as_bad (_("`%s' operand %u must use `%ses' segment"),
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i.tm.name,
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@ -7543,7 +7555,7 @@ process_operands (void)
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/* Default segment register this instruction will use for memory
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accesses. 0 means unknown. This is only for optimizing out
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unnecessary segment overrides. */
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const seg_entry *default_seg = 0;
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const reg_entry *default_seg = NULL;
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if (i.tm.opcode_modifier.sse2avx)
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{
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@ -7730,13 +7742,13 @@ process_operands (void)
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else if (i.tm.opcode_modifier.opcodespace == SPACE_BASE
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&& (i.tm.base_opcode & ~3) == MOV_AX_DISP32)
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{
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default_seg = &ds;
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default_seg = reg_ds;
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}
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else if (i.tm.opcode_modifier.isstring)
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{
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/* For the string instructions that allow a segment override
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on one of their operands, the default segment is ds. */
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default_seg = &ds;
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default_seg = reg_ds;
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}
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else if (i.short_form)
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{
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@ -7789,9 +7801,9 @@ process_operands (void)
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point, and the specified segment prefix will always be used. */
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if (i.seg[0]
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&& i.seg[0] != default_seg
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&& i.seg[0]->seg_prefix != i.prefix[SEG_PREFIX])
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&& i386_seg_prefixes[i.seg[0]->reg_num] != i.prefix[SEG_PREFIX])
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{
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if (!add_prefix (i.seg[0]->seg_prefix))
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if (!add_prefix (i386_seg_prefixes[i.seg[0]->reg_num]))
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return 0;
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}
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return 1;
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@ -7816,10 +7828,10 @@ static INLINE void set_rex_vrex (const reg_entry *r, unsigned int rex_bit,
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i.vrex |= rex_bit;
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}
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static const seg_entry *
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static const reg_entry *
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build_modrm_byte (void)
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{
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const seg_entry *default_seg = 0;
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const reg_entry *default_seg = NULL;
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unsigned int source, dest;
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int vex_3_sources;
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@ -8103,7 +8115,7 @@ build_modrm_byte (void)
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}
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}
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default_seg = &ds;
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default_seg = reg_ds;
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if (i.base_reg == 0)
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{
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@ -8197,7 +8209,7 @@ build_modrm_byte (void)
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i.rm.regmem = i.index_reg->reg_num - 6;
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break;
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case 5: /* (%bp) */
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default_seg = &ss;
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default_seg = reg_ss;
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if (i.index_reg == 0)
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{
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i.rm.regmem = 6;
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@ -8258,7 +8270,7 @@ build_modrm_byte (void)
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if (!(i.base_reg->reg_flags & RegRex)
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&& (i.base_reg->reg_num == EBP_REG_NUM
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|| i.base_reg->reg_num == ESP_REG_NUM))
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default_seg = &ss;
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default_seg = reg_ss;
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if (i.base_reg->reg_num == 5 && i.disp_operands == 0)
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{
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fake_zero_displacement = 1;
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@ -11325,27 +11337,7 @@ i386_att_operand (char *operand_string)
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++op_string;
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if (*op_string == ':' && r->reg_type.bitfield.class == SReg)
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{
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switch (r->reg_num)
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{
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case 0:
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i.seg[i.mem_operands] = &es;
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break;
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case 1:
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i.seg[i.mem_operands] = &cs;
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break;
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case 2:
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i.seg[i.mem_operands] = &ss;
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break;
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case 3:
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i.seg[i.mem_operands] = &ds;
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break;
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case 4:
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i.seg[i.mem_operands] = &fs;
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break;
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case 5:
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i.seg[i.mem_operands] = &gs;
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break;
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}
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i.seg[i.mem_operands] = r;
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/* Skip the ':' and whitespace. */
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++op_string;
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@ -1,3 +1,10 @@
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2021-03-30 Jan Beulich <jbeulich@suse.com>
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* i386-opc.c (cs, ds, ss, es, fs, gs): Delete.
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(i386_seg_prefixes): New.
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* i386-opc.h (cs, ds, ss, es, fs, gs): Delete.
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(i386_seg_prefixes): Declare.
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2021-03-30 Jan Beulich <jbeulich@suse.com>
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* i386-opc.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Delete.
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@ -23,10 +23,12 @@
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#include "i386-opc.h"
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#include "i386-tbl.h"
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/* Segment stuff. */
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const seg_entry cs = { "cs", 0x2e };
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const seg_entry ds = { "ds", 0x3e };
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const seg_entry ss = { "ss", 0x36 };
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const seg_entry es = { "es", 0x26 };
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const seg_entry fs = { "fs", 0x64 };
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const seg_entry gs = { "gs", 0x65 };
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/* To be indexed by segment register number. */
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const unsigned char i386_seg_prefixes[] = {
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ES_PREFIX_OPCODE,
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CS_PREFIX_OPCODE,
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SS_PREFIX_OPCODE,
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DS_PREFIX_OPCODE,
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FS_PREFIX_OPCODE,
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GS_PREFIX_OPCODE
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};
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@ -992,17 +992,4 @@ reg_entry;
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extern const reg_entry i386_regtab[];
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extern const unsigned int i386_regtab_size;
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typedef struct
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{
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char *seg_name;
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unsigned int seg_prefix;
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}
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seg_entry;
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extern const seg_entry cs;
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extern const seg_entry ds;
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extern const seg_entry ss;
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extern const seg_entry es;
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extern const seg_entry fs;
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extern const seg_entry gs;
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extern const unsigned char i386_seg_prefixes[6];
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