Prevent re-read of instruction from wrong address.
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@ -1,7 +1,25 @@
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2000-12-09 Nick Clifton <nickc@redhat.com>
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* m32r-dis.c (print_insn): Prevent re-read of instruction from
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wrong address.
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* fr30-dis.c: Regenerate.
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2000-12-08 Peter Targett <peter.targett@arccores.com>
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* configure.in: Add arc-ext.lo for bfd_arc_arch selection.
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* Makefile.am (C_FILES): Add arc-ext.c.
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(ALL_MACHINES) Add arc-ext.lo.
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(INCLUDES) Add opcode directory to list.
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New dependency entry for arc-ext.lo.
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* disassemble.c (disassembler): Correct call to
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arc_get_disassembler.
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* arc-opc.c: New update for ARC, including full base
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instructions for ARC variants.
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* arc-dis.h, arc-dis.c: New update for ARC, including
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extensibility functionality.
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* arc-ext.h, arc-ext.c: New files for handling extensibility.
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2000-12-03 Chris Demetriou cgd@sibyte.com
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* mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
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@ -68,12 +68,12 @@ do { \
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static void
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print_hash (cd, dis_info, value, attrs, pc, length)
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CGEN_CPU_DESC cd;
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CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
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PTR dis_info;
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long value;
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unsigned int attrs;
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bfd_vma pc;
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int length;
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long value ATTRIBUTE_UNUSED;
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unsigned int attrs ATTRIBUTE_UNUSED;
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bfd_vma pc ATTRIBUTE_UNUSED;
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int length ATTRIBUTE_UNUSED;
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{
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disassemble_info *info = (disassemble_info *) dis_info;
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(*info->fprintf_func) (info->stream, "#");
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@ -156,7 +156,7 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
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int opindex;
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PTR xinfo;
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CGEN_FIELDS *fields;
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void const *attrs;
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void const *attrs ATTRIBUTE_UNUSED;
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bfd_vma pc;
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int length;
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{
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@ -263,21 +263,12 @@ m32r_cgen_init_dis (cd)
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static void
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print_normal (cd, dis_info, value, attrs, pc, length)
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#ifdef CGEN_PRINT_NORMAL
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CGEN_CPU_DESC cd;
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#else
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CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
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#endif
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PTR dis_info;
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long value;
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unsigned int attrs;
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#ifdef CGEN_PRINT_NORMAL
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bfd_vma pc;
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int length;
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#else
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bfd_vma pc ATTRIBUTE_UNUSED;
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int length ATTRIBUTE_UNUSED;
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#endif
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{
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disassemble_info *info = (disassemble_info *) dis_info;
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@ -298,21 +289,12 @@ print_normal (cd, dis_info, value, attrs, pc, length)
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static void
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print_address (cd, dis_info, value, attrs, pc, length)
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#ifdef CGEN_PRINT_NORMAL
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CGEN_CPU_DESC cd;
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#else
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CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
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#endif
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PTR dis_info;
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bfd_vma value;
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unsigned int attrs;
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#ifdef CGEN_PRINT_NORMAL
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bfd_vma pc;
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int length;
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#else
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bfd_vma pc ATTRIBUTE_UNUSED;
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int length ATTRIBUTE_UNUSED;
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#endif
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{
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disassemble_info *info = (disassemble_info *) dis_info;
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@ -397,7 +379,7 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length)
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Returns 0 if all is well, non-zero otherwise. */
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static int
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read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
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CGEN_CPU_DESC cd;
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CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
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bfd_vma pc;
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disassemble_info *info;
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char *buf;
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@ -451,11 +433,30 @@ print_insn (cd, pc, info, buf, buflen)
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unsigned long insn_value;
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const CGEN_INSN_LIST *insn_list;
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CGEN_EXTRACT_INFO ex_info;
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#if 0
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int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value);
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if (rc != 0)
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return rc;
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#else
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ex_info.dis_info = info;
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ex_info.valid = (1 << buflen) - 1;
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ex_info.insn_bytes = buf;
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switch (buflen)
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{
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case 1:
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insn_value = buf[0];
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break;
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case 2:
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insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf);
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break;
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case 4:
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insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf);
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break;
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default:
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abort ();
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}
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#endif
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/* The instructions are stored in hash lists.
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Pick the first one and keep trying until we find the right one. */
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@ -486,9 +487,10 @@ print_insn (cd, pc, info, buf, buflen)
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machine insn and extracts the fields. The second pass prints
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them. */
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#if CGEN_INT_INSN_P
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/* Make sure the entire insn is loaded into insn_value. */
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if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize)
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/* Make sure the entire insn is loaded into insn_value, if it
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can fit. */
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if ((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize &&
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(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
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{
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unsigned long full_insn_value;
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int rc = read_insn (cd, pc, info, buf,
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@ -500,10 +502,8 @@ print_insn (cd, pc, info, buf, buflen)
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(cd, insn, &ex_info, full_insn_value, &fields, pc);
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}
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else
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#endif
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length = CGEN_EXTRACT_FN (cd, insn)
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(cd, insn, &ex_info, insn_value, &fields, pc);
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length = CGEN_EXTRACT_FN (cd, insn)
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(cd, insn, &ex_info, insn_value, &fields, pc);
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/* length < 0 -> error */
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if (length < 0)
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return length;
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@ -527,7 +527,6 @@ print_insn (cd, pc, info, buf, buflen)
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#ifndef CGEN_PRINT_INSN
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#define CGEN_PRINT_INSN default_print_insn
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#endif
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static int
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default_print_insn (cd, pc, info)
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@ -549,6 +548,7 @@ default_print_insn (cd, pc, info)
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return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8);
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}
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#endif
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/* Main entry point.
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Print one instruction from PC on INFO->STREAM.
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