Fix code to check for illegal element numbers when accessing AArch64 vector registers in AArch64 sim.
* cpustate.c (GET_VEC_ELEMENT): Fix off by one error checking for an invalid element index. (SET_VEC_ELEMENT): Likewise.
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@ -4,6 +4,10 @@
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Print hex equivalents of floats and doubles.
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Check element number against array size when accessing vector
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registers.
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(GET_VEC_ELEMENT): Fix off by one error checking for an invalid
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element index.
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(SET_VEC_ELEMENT): Likewise.
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* memory.c: Trace memory reads when --trace-memory is enabled.
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Remove float and double load and store functions.
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* memory.h (aarch64_get_mem_float): Delete prototype.
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@ -345,7 +345,7 @@ aarch64_set_FP_long_double (sim_cpu *cpu, VReg reg, FRegister a)
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#define GET_VEC_ELEMENT(REG, ELEMENT, FIELD) \
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do \
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{ \
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if (element > ARRAY_SIZE (cpu->fr[0].FIELD)) \
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if (element >= ARRAY_SIZE (cpu->fr[0].FIELD)) \
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{ \
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TRACE_REGISTER (cpu, \
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"Internal SIM error: invalid element number: %d ",\
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@ -421,7 +421,7 @@ aarch64_get_vec_double (sim_cpu *cpu, VReg reg, unsigned element)
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#define SET_VEC_ELEMENT(REG, ELEMENT, VAL, FIELD, PRINTER) \
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do \
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{ \
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if (ELEMENT > ARRAY_SIZE (cpu->fr[0].FIELD)) \
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if (ELEMENT >= ARRAY_SIZE (cpu->fr[0].FIELD)) \
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{ \
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TRACE_REGISTER (cpu, \
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"Internal SIM error: invalid element number: %d ",\
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