Documentation for the new mtag commands
Document the new "memory-tag" command prefix and all of its subcommands. gdb/doc/ChangeLog: 2021-03-24 Luis Machado <luis.machado@linaro.org> * gdb.texinfo (Memory Tagging): New subsection and node. (AArch64 Memory Tagging Extension): New subsection.
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2021-03-24 Luis Machado <luis.machado@linaro.org>
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* gdb.texinfo (Memory Tagging): New subsection and node.
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(AArch64 Memory Tagging Extension): New subsection.
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2021-03-24 Luis Machado <luis.machado@linaro.org>
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* gdb.texinfo (General Query Packets): Document qMemTags and
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@ -10864,6 +10864,66 @@ target supports computing the CRC checksum of a block of memory
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(@pxref{qCRC packet}).
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@end table
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@node Memory Tagging
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@subsection Memory Tagging
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Memory tagging is a memory protection technology that uses a pair of tags to
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validate memory accesses through pointers. The tags are integer values
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usually comprised of a few bits, depending on the architecture.
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There are two types of tags that are used in this setup: logical and
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allocation. A logical tag is stored in the pointers themselves, usually at the
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higher bits of the pointers. An allocation tag is the tag associated
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with particular ranges of memory in the physical address space, against which
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the logical tags from pointers are compared.
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The pointer tag (logical tag) must match the memory tag (allocation tag)
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for the memory access to be valid. If the logical tag does not match the
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allocation tag, that will raise a memory violation.
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Allocation tags cover multiple contiguous bytes of physical memory. This
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range of bytes is called a memory tag granule and is architecture-specific.
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For example, AArch64 has a tag granule of 16 bytes, meaning each allocation
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tag spans 16 bytes of memory.
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If the underlying architecture supports memory tagging, like AArch64 MTE
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or SPARC ADI do, @value{GDBN} can make use of it to validate pointers
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against memory allocation tags.
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A command prefix of @code{memory-tag} gives access to the various memory tagging
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commands.
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The @code{memory-tag} commands are the following:
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@table @code
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@kindex memory-tag print-logical-tag
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@item memory-tag print-logical-tag @var{pointer_expression}
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Print the logical tag stored in @var{pointer_expression}.
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@kindex memory-tag with-logical-tag
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@item memory-tag with-logical-tag @var{pointer_expression} @var{tag_bytes}
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Print the pointer given by @var{pointer_expression}, augmented with a logical
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tag of @var{tag_bytes}.
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@kindex memory-tag print-allocation-tag
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@item memory-tag print-allocation-tag @var{address_expression}
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Print the allocation tag associated with the memory address given by
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@var{address_expression}.
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@kindex memory-tag setatag
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@item memory-tag setatag @var{starting_address} @var{length} @var{tag_bytes}
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Set the allocation tag(s) for memory range @r{[}@var{starting_address},
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@var{starting_address} + @var{length}@r{)} to @var{tag_bytes}.
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@kindex memory-tag check
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@item memory-tag check @var{pointer_expression}
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Check if the logical tag in the pointer given by @var{pointer_expression}
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matches the allocation tag for the memory referenced by the pointer.
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This essentially emulates the hardware validation that is done when tagged
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memory is accessed through a pointer, but does not cause a memory fault as
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it would during hardware validation.
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It can be used to inspect potential memory tagging violations in the running
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process, before any faults get triggered.
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@end table
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@node Auto Display
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@section Automatic Display
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@cindex automatic display
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@ -24993,6 +25053,42 @@ When GDB prints a backtrace, any addresses that required unmasking will be
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postfixed with the marker [PAC]. When using the MI, this is printed as part
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of the @code{addr_flags} field.
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@subsubsection AArch64 Memory Tagging Extension.
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@cindex AArch64 Memory Tagging Extension.
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When @value{GDBN} is debugging the AArch64 architecture, the program is
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using the v8.5-A feature Memory Tagging Extension (MTE) and there is support
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in the kernel for MTE, @value{GDBN} will make memory tagging functionality
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available for inspection and editing of logical and allocation tags.
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@xref{Memory Tagging}.
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To aid debugging, @value{GDBN} will output additional information when SIGSEGV
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signals are generated as a result of memory tag failures.
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If the tag violation is synchronous, the following will be shown:
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@smallexample
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Program received signal SIGSEGV, Segmentation fault
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Memory tag violation while accessing address 0x0500fffff7ff8000
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Allocation tag 0x1
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Logical tag 0x5.
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@end smallexample
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If the tag violation is asynchronous, the fault address is not available.
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In this case @value{GDBN} will show the following:
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@smallexample
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Program received signal SIGSEGV, Segmentation fault
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Memory tag violation
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Fault address unavailable.
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@end smallexample
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A special register, @code{tag_ctl}, is made available through the
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@code{org.gnu.gdb.aarch64.mte} feature. This register exposes some
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options that can be controlled at runtime and emulates the @code{prctl}
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option @code{PR_SET_TAGGED_ADDR_CTRL}. For further information, see the
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documentation in the Linux kernel.
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@node i386
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@subsection x86 Architecture-specific Issues
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