x86: Check register operand for AddrPrefixOpReg
If the address prefix changes the register operand, we need to check the register operand when the memory operand is RIP-relative. PR gas/26685 * config/tc-i386.c (process_suffix): Check the register operand for the address size prefix if the memory operand is symbol(%rip). * testsuite/gas/i386/x86-64-enqcmd.s: Add tests with RIP-relative addressing. * testsuite/gas/i386/x86-64-movdir.s: Likewise. * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated. * testsuite/gas/i386/x86-64-enqcmd.d: Likewise. * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise. * testsuite/gas/i386/x86-64-movdir.d: Likewise.
This commit is contained in:
parent
95eb9e54a5
commit
27f134698a
@ -1,3 +1,16 @@
|
||||
2020-09-16 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
PR gas/26685
|
||||
* config/tc-i386.c (process_suffix): Check the register operand
|
||||
for the address size prefix if the memory operand is symbol(%rip).
|
||||
* testsuite/gas/i386/x86-64-enqcmd.s: Add tests with RIP-relative
|
||||
addressing.
|
||||
* testsuite/gas/i386/x86-64-movdir.s: Likewise.
|
||||
* testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
|
||||
* testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
|
||||
* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
|
||||
* testsuite/gas/i386/x86-64-movdir.d: Likewise.
|
||||
|
||||
2020-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
|
||||
|
||||
* config/tc-aarch64.c: Add Cortex-A78 and Cortex-A78AE cores.
|
||||
|
@ -7178,6 +7178,19 @@ process_suffix (void)
|
||||
unsigned int op;
|
||||
enum { need_word, need_dword, need_qword } need;
|
||||
|
||||
/* Check the register operand for the address size prefix if
|
||||
the memory operand is symbol(%rip). */
|
||||
if (i.mem_operands == 1
|
||||
&& i.reg_operands == 1
|
||||
&& i.operands == 2
|
||||
&& i.base_reg
|
||||
&& i.base_reg->reg_num == RegIP
|
||||
&& i.base_reg->reg_type.bitfield.qword
|
||||
&& i.types[1].bitfield.class == Reg
|
||||
&& i.op[1].regs->reg_type.bitfield.dword
|
||||
&& !add_prefix (ADDR_PREFIX_OPCODE))
|
||||
return 0;
|
||||
|
||||
if (flag_code == CODE_32BIT)
|
||||
need = i.prefix[ADDR_PREFIX] ? need_word : need_dword;
|
||||
else if (i.prefix[ADDR_PREFIX])
|
||||
|
@ -9,12 +9,24 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd rax,\[rcx\]
|
||||
[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
|
||||
[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds rax,\[rcx\]
|
||||
[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
|
||||
[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd rax,\[rcx\]
|
||||
[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
|
||||
[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds rax,\[rcx\]
|
||||
[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
|
||||
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd rax,\[rcx\]
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd eax,\[ecx\]
|
||||
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds rax,\[rcx\]
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds eax,\[ecx\]
|
||||
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd rax,\[rcx\]
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd eax,\[ecx\]
|
||||
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds rax,\[rcx\]
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds eax,\[ecx\]
|
||||
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
|
||||
#pass
|
||||
|
@ -9,12 +9,24 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%rcx\),%rax
|
||||
[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
|
||||
[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%rcx\),%rax
|
||||
[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
|
||||
[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%rcx\),%rax
|
||||
[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
|
||||
[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%rcx\),%rax
|
||||
[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
|
||||
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
|
||||
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
|
||||
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
|
||||
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
|
||||
+[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
|
||||
#pass
|
||||
|
@ -7,9 +7,21 @@ _start:
|
||||
enqcmd (%ecx),%eax
|
||||
enqcmds (%rcx),%rax
|
||||
enqcmds (%ecx),%eax
|
||||
enqcmd foo(%rip),%rcx
|
||||
enqcmd foo(%rip),%ecx
|
||||
enqcmd foo(%eip),%ecx
|
||||
enqcmds foo(%rip),%rcx
|
||||
enqcmds foo(%rip),%ecx
|
||||
enqcmds foo(%eip),%ecx
|
||||
|
||||
.intel_syntax noprefix
|
||||
enqcmd rax,[rcx]
|
||||
enqcmd eax,[ecx]
|
||||
enqcmds rax,[rcx]
|
||||
enqcmds eax,[ecx]
|
||||
enqcmd rcx,[rip+foo]
|
||||
enqcmd ecx,[rip+foo]
|
||||
enqcmd ecx,[eip+foo]
|
||||
enqcmds rcx,[rip+foo]
|
||||
enqcmds ecx,[rip+foo]
|
||||
enqcmds ecx,[eip+foo]
|
||||
|
@ -9,13 +9,19 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
|
||||
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b rax,\[rcx\]
|
||||
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b eax,\[ecx]
|
||||
[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[rcx\],eax
|
||||
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
|
||||
[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[rcx\],eax
|
||||
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
|
||||
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b rax,\[rcx\]
|
||||
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
|
||||
+[a-f0-9]+: 66 0f 38 f8 01 movdir64b rax,\[rcx\]
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b eax,\[ecx\]
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
|
||||
+[a-f0-9]+: 66 0f 38 f8 01 movdir64b rax,\[rcx\]
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b eax,\[ecx\]
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
|
||||
#pass
|
||||
|
@ -9,13 +9,19 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
|
||||
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
|
||||
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
|
||||
[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%rcx\)
|
||||
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
|
||||
[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%rcx\)
|
||||
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
|
||||
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
|
||||
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
|
||||
+[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%rcx\),%rax
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
|
||||
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
|
||||
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
|
||||
+[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%rcx\),%rax
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
|
||||
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
|
||||
#pass
|
||||
|
@ -6,6 +6,9 @@ _start:
|
||||
movdiri %rax, (%rcx)
|
||||
movdir64b (%rcx),%rax
|
||||
movdir64b (%ecx),%eax
|
||||
movdir64b foo(%rip),%rcx
|
||||
movdir64b foo(%rip),%ecx
|
||||
movdir64b foo(%eip),%ecx
|
||||
|
||||
.intel_syntax noprefix
|
||||
movdiri [rcx],eax
|
||||
@ -14,3 +17,6 @@ _start:
|
||||
movdiri qword ptr [rcx],rax
|
||||
movdir64b rax,[rcx]
|
||||
movdir64b eax,[ecx]
|
||||
movdir64b rcx,[rip+foo]
|
||||
movdir64b ecx,[rip+foo]
|
||||
movdir64b ecx,[eip+foo]
|
||||
|
Loading…
Reference in New Issue
Block a user