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opcodes/gas: blackfin: handle more ASTAT flags

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Support a few more ASTAT bits with the standard insns that operate on
ASTAT bits directly.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2010-09-22 21:05:03 +00:00
parent 73a63ccf2f
commit 22215ae09b
5 changed files with 28 additions and 5 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2010-09-22 Robin Getz <robin.getz@analog.com>
* config/bfin-defs.h (statusflags): Add AC0_COPY, V_COPY, and RND_MOD.
* config/bfin-lex.l: Tokenize AC0_COPY, V_COPY, and RND_MOD.
2010-09-22 Mike Frysinger <vapier@gentoo.org> 2010-09-22 Mike Frysinger <vapier@gentoo.org>
* config/bfin-aux.h (bfin_gen_pseudochr): New prototype. * config/bfin-aux.h (bfin_gen_pseudochr): New prototype.

5
gas/config/bfin-defs.h
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@ -1,5 +1,5 @@
/* bfin-defs.h ADI Blackfin gas header file /* bfin-defs.h ADI Blackfin gas header file
Copyright 2005, 2006, 2007, 2009 Copyright 2005, 2006, 2007, 2009, 2010
Free Software Foundation, Inc. Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler. This file is part of GAS, the GNU Assembler.
@ -120,7 +120,10 @@ enum statusflags
{ {
S_AZ = 0, S_AZ = 0,
S_AN, S_AN,
S_AC0_COPY,
S_V_COPY,
S_AQ = 6, S_AQ = 6,
S_RND_MOD = 8,
S_AC0 = 12, S_AC0 = 12,
S_AC1, S_AC1,
S_AV0 = 16, S_AV0 = 16,

3
gas/config/bfin-lex.l
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@ -208,6 +208,8 @@ int yylex (void);
[bB] return B; [bB] return B;
[aA][zZ] _REG.regno = S_AZ; return STATUS_REG; [aA][zZ] _REG.regno = S_AZ; return STATUS_REG;
[aA][nN] _REG.regno = S_AN; return STATUS_REG; [aA][nN] _REG.regno = S_AN; return STATUS_REG;
[aA][cC]0_[cC][oO][pP][yY] _REG.regno = S_AC0_COPY; return STATUS_REG;
[vV]_[cC][oO][pP][yY] _REG.regno = S_V_COPY; return STATUS_REG;
[aA][qQ] _REG.regno = S_AQ; return STATUS_REG; [aA][qQ] _REG.regno = S_AQ; return STATUS_REG;
[aA][cC]0 _REG.regno = S_AC0; return STATUS_REG; [aA][cC]0 _REG.regno = S_AC0; return STATUS_REG;
[aA][cC]1 _REG.regno = S_AC1; return STATUS_REG; [aA][cC]1 _REG.regno = S_AC1; return STATUS_REG;
@ -216,6 +218,7 @@ int yylex (void);
[aA][vV]1 _REG.regno = S_AV1; return STATUS_REG; [aA][vV]1 _REG.regno = S_AV1; return STATUS_REG;
[aA][vV]1[sS] _REG.regno = S_AV1S; return STATUS_REG; [aA][vV]1[sS] _REG.regno = S_AV1S; return STATUS_REG;
[vV][sS] _REG.regno = S_VS; return STATUS_REG; [vV][sS] _REG.regno = S_VS; return STATUS_REG;
[rR][nN][dD]_[mM][oO][dD] _REG.regno = S_RND_MOD; return STATUS_REG;
[aA][sS][tT][aA][tT] _REG.regno = REG_ASTAT; return REG; [aA][sS][tT][aA][tT] _REG.regno = REG_ASTAT; return REG;

6
opcodes/ChangeLog
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@ -1,3 +1,9 @@
2010-09-22 Robin Getz <robin.getz@analog.com>
* bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
(reg_names): Likewise.
(decode_statbits): Likewise; while reformatting to make manageable.
2010-09-22 Mike Frysinger <vapier@gentoo.org> 2010-09-22 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC. * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.

14
opcodes/bfin-dis.c
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@ -242,6 +242,7 @@ enum machine_registers
REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3, REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3,
REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_MH2, REG_MH3, REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_MH2, REG_MH3,
REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3, REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3,
REG_AC0_COPY, REG_V_COPY, REG_RND_MOD,
REG_LASTREG, REG_LASTREG,
}; };
@ -277,6 +278,7 @@ static const char *reg_names[] =
"B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L", "B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L",
"I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H", "I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H",
"B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H", "B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H",
"AC0_COPY", "V_COPY", "RND_MOD",
"LASTREG", "LASTREG",
0 0
}; };
@ -398,10 +400,14 @@ static enum machine_registers decode_regs_hi[] =
static enum machine_registers decode_statbits[] = static enum machine_registers decode_statbits[] =
{ {
REG_AZ, REG_AN, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AQ, REG_LASTREG, REG_AZ, REG_AN, REG_AC0_COPY, REG_V_COPY,
REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AC0, REG_AC1, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AQ, REG_LASTREG,
REG_AV0, REG_AV0S, REG_AV1, REG_AV1S, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_RND_MOD, REG_LASTREG, REG_LASTREG, REG_LASTREG,
REG_V, REG_VS, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AC0, REG_AC1, REG_LASTREG, REG_LASTREG,
REG_AV0, REG_AV0S, REG_AV1, REG_AV1S,
REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
REG_V, REG_VS, REG_LASTREG, REG_LASTREG,
REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
}; };
#define statbits(x) REGNAME (decode_statbits[(x) & 31]) #define statbits(x) REGNAME (decode_statbits[(x) & 31])