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Aarch64 sim fix for gcc-10 miscompilation.

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This fixes a problem that occurs when compiled by gcc-10, as the code
is relying on undefined overflow behavior.  This is fixed by replacing
compares between 32-bit and 64-bit results with compares that just use
the 64-bit results with a cast.

	PR sim/27483
	* simulator.c (set_flags_for_add32): Compare uresult against
	itself.  Compare sresult against itself.
This commit is contained in:
Jim Wilson 2021-04-07 18:51:52 -07:00
parent bf5271659d
commit 0592e80bcf
2 changed files with 8 additions and 2 deletions
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6
sim/aarch64/ChangeLog
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@ -1,3 +1,9 @@
2021-04-07 Jim Wilson <jimw@sifive.com>
PR sim/27483
* simulator.c (set_flags_for_add32): Compare uresult against
itself. Compare sresult against itself.
2021-04-02 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4, configure: Regenerate.

4
sim/aarch64/simulator.c
View File

@ -1650,10 +1650,10 @@ set_flags_for_add32 (sim_cpu *cpu, int32_t value1, int32_t value2)
if (result & (1 << 31))
flags |= N;
if (uresult != (uint32_t)result)
if (uresult != (uint32_t)uresult)
flags |= C;
if (sresult != result)
if (sresult != (int32_t)sresult)
flags |= V;
aarch64_set_CPSR (cpu, flags);