diff --git a/index.html b/index.html index a8d4293..143a3f0 100644 --- a/index.html +++ b/index.html @@ -1,6 +1,6 @@ - MatCat's 8SA1 CPU Simulator + MatCat's 8SA1 CPU Emulator
@@ -56,6 +56,7 @@ RAM (STACK):
+ diff --git a/isa.html b/isa.html new file mode 100644 index 0000000..c8903d7 --- /dev/null +++ b/isa.html @@ -0,0 +1,15 @@ + + + MatCat's 8SA1 CPU ISA Documentation + + + +
+ +
+ + + + + + diff --git a/js/cpu.js b/js/cpu.js index 34fa733..1330648 100644 --- a/js/cpu.js +++ b/js/cpu.js @@ -1,73 +1,3 @@ -// Setup a few bitmasks we can use in the code that are handy to clean inputs to registers -const BITMASK_8 = 0x00000000000000ff; -const BITMASK_16 = 0x000000000000ffff; -const BITMASK_24 = 0x0000000000ffffff; - - - -// These are the control lines that are controlled by the microcode RAM output -const CONTROL_PCC = 0b00000000000000000000000000000001; // PC CLK UP -const CONTROL_PCI = 0b00000000000000000000000000000010; // PC Input Enable -const CONTROL_SPD = 0b00000000000000000000000000000100; // SP Count Down -const CONTROL_SPC = 0b00000000000000000000000000001000; // SP CLK (UP / DOWN) -const CONTROL_SPI = 0b00000000000000000000000000010000; // SP Input Enable -const CONTROL_RAIL = 0b00000000000000000000000000100000; // GPA LOW Input Enable -const CONTROL_RAIH = 0b00000000000000000000000001000000; // GPA HIGH Input Enable -const CONTROL_RBIL = 0b00000000000000000000000010000000; // GPB LOW Input Enable -const CONTROL_RBIH = 0b00000000000000000000000100000000; // GPB HIGH Input Enable -const CONTROL_RCIL = 0b00000000000000000000001000000000; // GPC LOW Input Enable -const CONTROL_RCIH = 0b00000000000000000000010000000000; // GPC HIGH Input Enable -const CONTROL_RDIL = 0b00000000000000000000100000000000; // GPD LOW Input Enable -const CONTROL_RDIH = 0b00000000000000000001000000000000; // GPD HIGH Input Enable -const CONTROL_RRI = 0b00000000000000000010000000000000; // LOW Ram Register Input Enable -const CONTROL_RHI = 0b00000000000000000100000000000000; // HIGH Ram Register Input Enable -const CONTROL_ALUM0 = 0b00000000000000001000000000000000; // ALU MUX 0 -const CONTROL_ALUM1 = 0b00000000000000010000000000000000; // ALU MUX 1 -const CONTROL_ALUI = 0b00000000000000100000000000000000; // ALU Invert (high side) -const CONTROL_ALUC = 0b00000000000001000000000000000000; // ALU Carry Input -const CONTROL_ALUSL = 0b00000000000010000000000000000000; // ALU Shift Left -const CONTROL_ALUSR = 0b00000000000100000000000000000000; // ALU Shift Right -const CONTROL_OEM0 = 0b00000000001000000000000000000000; // Output Enable MUX 0 -const CONTROL_OEM1 = 0b00000000010000000000000000000000; // Output Enable MUX 1 -const CONTROL_OEM2 = 0b00000000100000000000000000000000; // Output Enable MUX 2 -const CONTROL_OEM3 = 0b00000001000000000000000000000000; // Output Enable MUX 3 -const CONTROL_OEM4 = 0b00000010000000000000000000000000; // Output Enable MUX 4 -const CONTROL_OEME = 0b00000100000000000000000000000000; // Output Enable MUX Enable -const CONTROL_AE = 0b00001000000000000000000000000000; // ALU Enable -const CONTROL_RI = 0b00010000000000000000000000000000; // RAM Input Enable -const CONTROL_IRI = 0b00100000000000000000000000000000; // Instruction Register Input Enable -const CONTROL_MCL0 = 0b01000000000000000000000000000000; // Microcode Counter to 0 -const CONTROL_MCL8 = 0b10000000000000000000000000000000; // Microcode Counter to 8 - -// These are the output enable control lines, they are muxed since none of them can ever be on together -const OECONTROL_PC = 0b00000 // PC Register -const OECONTROL_SP = 0b00001 // SP Register -const OECONTROL_AL = 0b00010 // GPA to LOW -const OECONTROL_AH = 0b00011 // GPA to HIGH -const OECONTROL_BL = 0b00100 // GPB to LOW -const OECONTROL_BH = 0b00101 // GPB to HIGH -const OECONTROL_CL = 0b00110 // GPC to LOW -const OECONTROL_CH = 0b00111 // GPC to HIGH -const OECONTROL_DL = 0b01000 // GPD to LOW -const OECONTROL_DH = 0b01001 // GPD to HIGH -const OECONTROL_AB = 0b01010 // GPB to HIGH, GPA to LOW -const OECONTROL_AC = 0b01011 // GPC to HIGH, GPA to LOW -const OECONTROL_AD = 0b01100 // GPD to HIGH, GPA to LOW -const OECONTROL_BA = 0b01101 // GPA to HIGH, GPB to LOW -const OECONTROL_BC = 0b01110 // GPC to HIGH, GPB to LOW -const OECONTROL_BD = 0b01111 // GPD to HIGH, GPB to LOW -const OECONTROL_CA = 0b10000 // GPA to HIGH, GPC to LOW -const OECONTROL_CB = 0b10001 // GPB to HIGH, GPC to LOW -const OECONTROL_CD = 0b10010 // GPD to HIGH, GPC to LOW -const OECONTROL_DA = 0b10011 // GPA to HIGH, GPD to LOW -const OECONTROL_DB = 0b10100 // GPB to HIGH, GPD to LOW -const OECONTROL_DC = 0b10101 // GPC to HIGH, GPD to LOW -const OECONTROL_AO = 0b11101 // ALU Output to LOW -const OECONTROL_SR = 0b11110 // Status Register to LOW -const OECONTROL_RO = 0b11111 // RAM to DATABUS Enable - - - let intval = null; let breakpt = null; let ramlines = {value: 1}; @@ -78,61 +8,6 @@ function stringToRAM(rstring,ram,address) { } } -function reverseString(str) { - return str.split("").reverse().join(""); -} - -function formatHex(value,places,spaces=0) { - let hexval = parseInt(value,10).toString(16).toUpperCase(); - if (hexval.length < places) { - let placecount = (places - hexval.length); - for (let a = 0; a < placecount; a++) { - hexval = "0" + hexval; - } - } - if (spaces > 0) { - hexval = reverseString(hexval); - let newhexval = ""; - for (let a = 0; a < hexval.length; a++) { - newhexval += hexval.substring(a,a+1); - if ((a % spaces) === 3 && a !== hexval.length-1) newhexval += " "; - } - hexval = reverseString(newhexval); - } - return hexval; -} - -function formatBinary(value,places,spaces=0,labels = false) { - let hexval = parseInt(value,10).toString(2); - if (hexval.length < places) { - let placecount = (places - hexval.length); - for (let a = 0; a < placecount; a++) { - hexval = "0" + hexval; - } - } - if (spaces > 0) { - hexval = reverseString(hexval); - let newhexval = ""; - for (let a = 0; a < hexval.length; a++) { - if (labels) { - newhexval += reverseString(``) + hexval.substring(a,a+1) + reverseString(``); - } else { - newhexval += hexval.substring(a,a+1); - } - if ((a % spaces) === 3 && a !== hexval.length-1) newhexval += " "; - } - hexval = reverseString(newhexval); - } - return hexval; -} - -function GetMnemonic(mcarray,instruction) { - for (let a = 0; a < mcarray.length; a++) { - if (mcarray[a] === instruction || mcarray[a].Bytecode === instruction) { - return mcarray[a].Mnemonic; - } - } -} function generateClocks(clk_cnt) { for (let a = 0; a < clk_cnt; a++) { diff --git a/js/defines.js b/js/defines.js new file mode 100644 index 0000000..68cf393 --- /dev/null +++ b/js/defines.js @@ -0,0 +1,124 @@ +// Setup a few bitmasks we can use in the code that are handy to clean inputs to registers +const BITMASK_8 = 0x00000000000000ff; +const BITMASK_16 = 0x000000000000ffff; +const BITMASK_24 = 0x0000000000ffffff; + + + +// These are the control lines that are controlled by the microcode RAM output +const CONTROL_PCC = 0b00000000000000000000000000000001; // PC CLK UP +const CONTROL_PCI = 0b00000000000000000000000000000010; // PC Input Enable +const CONTROL_SPD = 0b00000000000000000000000000000100; // SP Count Down +const CONTROL_SPC = 0b00000000000000000000000000001000; // SP CLK (UP / DOWN) +const CONTROL_SPI = 0b00000000000000000000000000010000; // SP Input Enable +const CONTROL_RAIL = 0b00000000000000000000000000100000; // GPA LOW Input Enable +const CONTROL_RAIH = 0b00000000000000000000000001000000; // GPA HIGH Input Enable +const CONTROL_RBIL = 0b00000000000000000000000010000000; // GPB LOW Input Enable +const CONTROL_RBIH = 0b00000000000000000000000100000000; // GPB HIGH Input Enable +const CONTROL_RCIL = 0b00000000000000000000001000000000; // GPC LOW Input Enable +const CONTROL_RCIH = 0b00000000000000000000010000000000; // GPC HIGH Input Enable +const CONTROL_RDIL = 0b00000000000000000000100000000000; // GPD LOW Input Enable +const CONTROL_RDIH = 0b00000000000000000001000000000000; // GPD HIGH Input Enable +const CONTROL_RRI = 0b00000000000000000010000000000000; // LOW Ram Register Input Enable +const CONTROL_RHI = 0b00000000000000000100000000000000; // HIGH Ram Register Input Enable +const CONTROL_ALUM0 = 0b00000000000000001000000000000000; // ALU MUX 0 +const CONTROL_ALUM1 = 0b00000000000000010000000000000000; // ALU MUX 1 +const CONTROL_ALUI = 0b00000000000000100000000000000000; // ALU Invert (high side) +const CONTROL_ALUC = 0b00000000000001000000000000000000; // ALU Carry Input +const CONTROL_ALUSL = 0b00000000000010000000000000000000; // ALU Shift Left +const CONTROL_ALUSR = 0b00000000000100000000000000000000; // ALU Shift Right +const CONTROL_OEM0 = 0b00000000001000000000000000000000; // Output Enable MUX 0 +const CONTROL_OEM1 = 0b00000000010000000000000000000000; // Output Enable MUX 1 +const CONTROL_OEM2 = 0b00000000100000000000000000000000; // Output Enable MUX 2 +const CONTROL_OEM3 = 0b00000001000000000000000000000000; // Output Enable MUX 3 +const CONTROL_OEM4 = 0b00000010000000000000000000000000; // Output Enable MUX 4 +const CONTROL_OEME = 0b00000100000000000000000000000000; // Output Enable MUX Enable +const CONTROL_AE = 0b00001000000000000000000000000000; // ALU Enable +const CONTROL_RI = 0b00010000000000000000000000000000; // RAM Input Enable +const CONTROL_IRI = 0b00100000000000000000000000000000; // Instruction Register Input Enable +const CONTROL_MCL0 = 0b01000000000000000000000000000000; // Microcode Counter to 0 +const CONTROL_MCL8 = 0b10000000000000000000000000000000; // Microcode Counter to 8 + +// These are the output enable control lines, they are muxed since none of them can ever be on together +const OECONTROL_PC = 0b00000 // PC Register +const OECONTROL_SP = 0b00001 // SP Register +const OECONTROL_AL = 0b00010 // GPA to LOW +const OECONTROL_AH = 0b00011 // GPA to HIGH +const OECONTROL_BL = 0b00100 // GPB to LOW +const OECONTROL_BH = 0b00101 // GPB to HIGH +const OECONTROL_CL = 0b00110 // GPC to LOW +const OECONTROL_CH = 0b00111 // GPC to HIGH +const OECONTROL_DL = 0b01000 // GPD to LOW +const OECONTROL_DH = 0b01001 // GPD to HIGH +const OECONTROL_AB = 0b01010 // GPB to HIGH, GPA to LOW +const OECONTROL_AC = 0b01011 // GPC to HIGH, GPA to LOW +const OECONTROL_AD = 0b01100 // GPD to HIGH, GPA to LOW +const OECONTROL_BA = 0b01101 // GPA to HIGH, GPB to LOW +const OECONTROL_BC = 0b01110 // GPC to HIGH, GPB to LOW +const OECONTROL_BD = 0b01111 // GPD to HIGH, GPB to LOW +const OECONTROL_CA = 0b10000 // GPA to HIGH, GPC to LOW +const OECONTROL_CB = 0b10001 // GPB to HIGH, GPC to LOW +const OECONTROL_CD = 0b10010 // GPD to HIGH, GPC to LOW +const OECONTROL_DA = 0b10011 // GPA to HIGH, GPD to LOW +const OECONTROL_DB = 0b10100 // GPB to HIGH, GPD to LOW +const OECONTROL_DC = 0b10101 // GPC to HIGH, GPD to LOW +const OECONTROL_AO = 0b11101 // ALU Output to LOW +const OECONTROL_SR = 0b11110 // Status Register to LOW +const OECONTROL_RO = 0b11111 // RAM to DATABUS Enable + + +function reverseString(str) { + return str.split("").reverse().join(""); +} + +function formatHex(value,places,spaces=0) { + let hexval = parseInt(value,10).toString(16).toUpperCase(); + if (hexval.length < places) { + let placecount = (places - hexval.length); + for (let a = 0; a < placecount; a++) { + hexval = "0" + hexval; + } + } + if (spaces > 0) { + hexval = reverseString(hexval); + let newhexval = ""; + for (let a = 0; a < hexval.length; a++) { + newhexval += hexval.substring(a,a+1); + if ((a % spaces) === 3 && a !== hexval.length-1) newhexval += " "; + } + hexval = reverseString(newhexval); + } + return hexval; +} + +function formatBinary(value,places,spaces=0,labels = false) { + let hexval = parseInt(value,10).toString(2); + if (hexval.length < places) { + let placecount = (places - hexval.length); + for (let a = 0; a < placecount; a++) { + hexval = "0" + hexval; + } + } + if (spaces > 0) { + hexval = reverseString(hexval); + let newhexval = ""; + for (let a = 0; a < hexval.length; a++) { + if (labels) { + newhexval += reverseString(``) + hexval.substring(a,a+1) + reverseString(``); + } else { + newhexval += hexval.substring(a,a+1); + } + if ((a % spaces) === 3 && a !== hexval.length-1) newhexval += " "; + } + hexval = reverseString(newhexval); + } + return hexval; +} + +function GetMnemonic(mcarray,instruction) { + for (let a = 0; a < mcarray.length; a++) { + if (mcarray[a] === instruction || mcarray[a].Bytecode === instruction) { + return mcarray[a].Mnemonic; + } + } +} diff --git a/js/instruction_doc.js b/js/instruction_doc.js new file mode 100644 index 0000000..a761ece --- /dev/null +++ b/js/instruction_doc.js @@ -0,0 +1,72 @@ +let isalist = document.getElementById("isa_list"); + +let ISAPrepList = new Array(); + +function hasInstruction(ins) { + for (let a = 0; a < ISAPrepList.length; a++) { + if (ISAPrepList[a].Mnemonic.toLowerCase() === ins.Mnemonic.toLowerCase()) { + return a; + } + } + return false; +} + +for (let a = 0; a < Instructions.length; a++) { + if (hasInstruction(Instructions[a]) === false) { + ISAPrepList.push({Mnemonic: Instructions[a].Mnemonic,LongName: Instructions[a].LongName,Varients: new Array(Instructions[a])}); + } else { + console.log(`${Instructions[a].Mnemonic} IS ALREADY THERE LETS ADD TO IT`); + ISAPrepList[hasInstruction(Instructions[a])].Varients.push(Instructions[a]); + } +} + +let outHTML = ""; +for (let a = 0; a < ISAPrepList.length; a++) { + outHTML += `
`; + outHTML += `

${ISAPrepList[a].Mnemonic}    ${ISAPrepList[a].LongName}

`; + outHTML += ``; + outHTML += ``; + outHTML += ``; + outHTML += ``; + for (let b=0; b < ISAPrepList[a].Varients.length; b++) { + let operandtext = ""; + for (let c = 0; c < ISAPrepList[a].Varients[b].Operands.length; c++) { + let operandresult = ISAPrepList[a].Varients[b].Operands[c].Operand; + let ogor = operandresult; + if (operandresult === "#") operandresult = ""; + if (operandresult === "$" || operandresult === "") { + switch (Math.floor(Math.random() * 9)) { + case 0: + case 1: + case 2: + case 3: { + operandresult = ((ogor === "#") ? "" : ogor) + formatHex(Math.floor(Math.random() * (2 ** ISAPrepList[a].Varients[b].Operands[c].Bitwidth)), ((ISAPrepList[a].Varients[b].Operands[c].Bitwidth === 16) ? 4 : 2)) + "h"; + break; + } + case 4: + case 5: + case 6: + case 7: { + operandresult = ((ogor === "#") ? "" : ogor) + Math.floor(Math.random() * (2 ** ISAPrepList[a].Varients[b].Operands[c].Bitwidth)); + break; + } + case 8: { + operandresult = ((ogor === "#") ? "" : ogor) + "MyVar"; + break; + } + } + } + if (ogor === "#") operandresult = "[" + operandresult + "]"; + + operandtext += ` ${operandresult},`; + } + operandtext = operandtext.substring(0,operandtext.length-1); + outHTML += ``; + outHTML += ``; + outHTML += ``; + } + outHTML += `
Address ModeExampleBytecodeWordsCycles
${ISAPrepList[a].Varients[b].Type}${ISAPrepList[a].Mnemonic}${operandtext}0x${formatHex(ISAPrepList[a].Varients[b].Bytecode,4)}${ISAPrepList[a].Varients[b].Words}${ISAPrepList[a].Varients[b].Cycles}
`; + outHTML += `
`; +} + +isalist.innerHTML = outHTML; \ No newline at end of file diff --git a/js/main.js b/js/main.js index 88566a4..60a934c 100644 --- a/js/main.js +++ b/js/main.js @@ -16,7 +16,7 @@ cpu.RAM[0xD3] = is_LDAB_i.Bytecode; cpu.RAM[0xD4] = 0x8000; cpu.RAM[0xD5] = is_PHAB.Bytecode; cpu.RAM[0xD6] = is_LDAB_GPCD.Bytecode; // printloop -cpu.RAM[0xD7] = is_CMP_gpab.Bytecode; +cpu.RAM[0xD7] = is_CMP.Bytecode; cpu.RAM[0xD8] = is_BEQ_i.Bytecode; cpu.RAM[0xD9] = 0x00ED; cpu.RAM[0xDA] = is_STAL_spin.Bytecode; diff --git a/js/microcode_compiler.js b/js/microcode_compiler.js index 9d9cb71..ef5f212 100644 --- a/js/microcode_compiler.js +++ b/js/microcode_compiler.js @@ -186,11 +186,14 @@ class Microcode_Instruction { constructor() { this.Bytecode = 0x000; // MAX IS 0x3ff this.Mnemonic = "NOP"; + this.LongName = ""; this.Aliases = new Array(); this.Microcode = new Array(16); this.Operands = new Array(); this.UsesCarry = false; this.UsesZero = false; + this.Words = 1; + this.Cycles = 2; this.Type = InstructionTypes.SingleWord; @@ -209,10 +212,14 @@ class IS_LDA_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x000; this.Mnemonic = "LDA"; + this.LongName = "LOAD Register A"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + + this.Words = 2; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RAIL | CONTROL_PCC; @@ -226,10 +233,13 @@ class IS_LDB_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x001; this.Mnemonic = "LDB"; + this.LongName = "LOAD Register B"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RBIL | CONTROL_PCC; } @@ -242,10 +252,13 @@ class IS_LDC_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x002; this.Mnemonic = "LDC"; + this.LongName = "LOAD Register C"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RCIL | CONTROL_PCC; } @@ -258,10 +271,13 @@ class IS_LDD_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x003; this.Mnemonic = "LDD"; + this.LongName = "LOAD Register D"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RDIL | CONTROL_PCC; } @@ -277,10 +293,13 @@ class IS_LDA_abs extends Microcode_Instruction { super(props); this.Bytecode = 0x004; this.Mnemonic = "LDA"; + this.LongName = "LOAD Register A"; this.Aliases = new Array(); this.Type = InstructionTypes.Absolute; - this.Operands = new Array(); + this.Operands = new Array({Operand: "", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; @@ -295,10 +314,13 @@ class IS_LDB_abs extends Microcode_Instruction { super(props); this.Bytecode = 0x005; this.Mnemonic = "LDB"; + this.LongName = "LOAD Register B"; this.Aliases = new Array(); this.Type = InstructionTypes.Absolute; - this.Operands = new Array(); + this.Operands = new Array({Operand: "", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RBIL | CONTROL_PCC; @@ -312,10 +334,13 @@ class IS_LDC_abs extends Microcode_Instruction { super(props); this.Bytecode = 0x006; this.Mnemonic = "LDC"; + this.LongName = "LOAD Register C"; this.Aliases = new Array(); this.Type = InstructionTypes.Absolute; - this.Operands = new Array(); + this.Operands = new Array({Operand: "", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RCIL | CONTROL_PCC; @@ -329,10 +354,13 @@ class IS_LDD_abs extends Microcode_Instruction { super(props); this.Bytecode = 0x007; this.Mnemonic = "LDD"; + this.LongName = "LOAD Register D"; this.Aliases = new Array(); this.Type = InstructionTypes.Absolute; - this.Operands = new Array(); + this.Operands = new Array({Operand: "", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RDIL | CONTROL_PCC; @@ -348,10 +376,13 @@ class IS_LDA_ind extends Microcode_Instruction { super(props); this.Bytecode = 0x008; this.Mnemonic = "LDA"; + this.LongName = "LOAD Register A"; this.Aliases = new Array(); this.Type = InstructionTypes.Indirect; - this.Operands = new Array(); + this.Operands = new Array({Operand: "#", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 6; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; @@ -367,10 +398,13 @@ class IS_LDB_ind extends Microcode_Instruction { super(props); this.Bytecode = 0x009; this.Mnemonic = "LDB"; + this.LongName = "LOAD Register B"; this.Aliases = new Array(); + this.Words = 2; + this.Cycles = 6; this.Type = InstructionTypes.Indirect; - this.Operands = new Array(); + this.Operands = new Array({Operand: "#", Bitwidth: 16}); this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RRI; @@ -385,10 +419,13 @@ class IS_LDC_ind extends Microcode_Instruction { super(props); this.Bytecode = 0x00A; this.Mnemonic = "LDC"; + this.LongName = "LOAD Register C"; this.Aliases = new Array(); this.Type = InstructionTypes.Indirect; - this.Operands = new Array(); + this.Operands = new Array({Operand: "#", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 6; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RRI; @@ -403,10 +440,13 @@ class IS_LDD_ind extends Microcode_Instruction { super(props); this.Bytecode = 0x00B; this.Mnemonic = "LDD"; + this.LongName = "LOAD Register D"; this.Aliases = new Array(); this.Type = InstructionTypes.Indirect; - this.Operands = new Array(); + this.Operands = new Array({Operand: "#", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 6; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RRI; @@ -422,10 +462,13 @@ class IS_LDAB_GPCD extends Microcode_Instruction { super(props); this.Bytecode = 0x020; this.Mnemonic = "LDAB"; + this.LongName = "LOAD Register A and B"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; - this.Operands = new Array("CD"); + this.Operands = new Array({Operand: "CD", Bitwidth: 16}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_CD | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RAIL | CONTROL_RBIH; } @@ -438,10 +481,13 @@ class IS_LDAB_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x021; this.Mnemonic = "LDAB"; + this.LongName = "LOAD Register A and B"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RAIL | CONTROL_RBIH | CONTROL_PCC; } @@ -454,10 +500,13 @@ class IS_LDAB_abs extends Microcode_Instruction { super(props); this.Bytecode = 0x022; this.Mnemonic = "LDAB"; + this.LongName = "LOAD Register A and B"; this.Aliases = new Array(); this.Type = InstructionTypes.Absolute; - this.Operands = new Array(); + this.Operands = new Array({Operand: "", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RAIL | CONTROL_RBIH | CONTROL_PCC; @@ -472,10 +521,13 @@ class IS_STAL_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x030; this.Mnemonic = "STAL"; + this.LongName = "STORE Register A to LOW Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_AL | CONTROL_RI; @@ -489,10 +541,13 @@ class IS_STAH_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x031; this.Mnemonic = "STAH"; + this.LongName = "STORE Register A to HIGH Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_AH | CONTROL_RI; @@ -506,10 +561,13 @@ class IS_STBL_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x032; this.Mnemonic = "STBL"; + this.LongName = "STORE Register B to LOW Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_BL | CONTROL_RI; @@ -523,10 +581,13 @@ class IS_STBH_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x033; this.Mnemonic = "STBH"; + this.LongName = "STORE Register B to HIGH Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_BH | CONTROL_RI; @@ -540,10 +601,13 @@ class IS_STCL_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x034; this.Mnemonic = "STCL"; + this.LongName = "STORE Register C to LOW Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_CL | CONTROL_RI; @@ -557,10 +621,13 @@ class IS_STCH_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x035; this.Mnemonic = "STCH"; + this.LongName = "STORE Register C to HIGH Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_CH | CONTROL_RI; @@ -574,10 +641,13 @@ class IS_STDL_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x036; this.Mnemonic = "STDL"; + this.LongName = "STORE Register D to LOW Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_DL | CONTROL_RI; @@ -591,10 +661,13 @@ class IS_STDH_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x037; this.Mnemonic = "STDH"; + this.LongName = "STORE Register D to HIGH Byte"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_DH | CONTROL_RI; @@ -608,10 +681,13 @@ class IS_STAB_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x038; this.Mnemonic = "STAB"; + this.LongName = "STORE Register A and B"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array("$"); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 5; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_PCC; this.Microcode[4] = CONTROL_OUT_AB | CONTROL_RI; @@ -625,10 +701,13 @@ class IS_STAB_sp extends Microcode_Instruction { super(props); this.Bytecode = 0x039; this.Mnemonic = "STAB"; + this.LongName = "STORE Register A and B"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; - this.Operands = new Array("SP"); + this.Operands = new Array({Operand: "SP", Bitwidth: 16}); + this.Words = 1; + this.Cycles = 6; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_SPD | CONTROL_SPC; @@ -643,10 +722,13 @@ class IS_STAL_sp_ind extends Microcode_Instruction { super(props); this.Bytecode = 0x03A; this.Mnemonic = "STAL"; + this.LongName = "STORE Register A to LOW Byte"; this.Aliases = new Array(); - this.Type = InstructionTypes.Immediate; - this.Operands = new Array("#"); + this.Type = InstructionTypes.Indirect; + this.Operands = new Array({Operand: "[SP]", Bitwidth: 16}); + this.Words = 1; + this.Cycles = 6; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RRI | CONTROL_SPD | CONTROL_SPC; @@ -662,10 +744,13 @@ class IS_TAB extends Microcode_Instruction { super(props); this.Bytecode = 0x040; this.Mnemonic = "TAB"; + this.LongName = "TRANSFER Register A to B"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_AL | CONTROL_RBIL; } } @@ -678,10 +763,13 @@ class IS_TAC extends Microcode_Instruction { super(props); this.Bytecode = 0x041; this.Mnemonic = "TAC"; + this.LongName = "TRANSFER Register A to C"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_AL | CONTROL_RCIL; } } @@ -694,10 +782,13 @@ class IS_TAD extends Microcode_Instruction { super(props); this.Bytecode = 0x042; this.Mnemonic = "TAD"; + this.LongName = "TRANSFER Register A to D"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_AL | CONTROL_RDIL; } } @@ -710,10 +801,13 @@ class IS_TBA extends Microcode_Instruction { super(props); this.Bytecode = 0x043; this.Mnemonic = "TBA"; + this.LongName = "TRANSFER Register B to A"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_BL | CONTROL_RAIL; } } @@ -726,10 +820,13 @@ class IS_TBC extends Microcode_Instruction { super(props); this.Bytecode = 0x044; this.Mnemonic = "TBC"; + this.LongName = "TRANSFER Register B to C"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_BL | CONTROL_RCIL; } } @@ -742,10 +839,13 @@ class IS_TBD extends Microcode_Instruction { super(props); this.Bytecode = 0x045; this.Mnemonic = "TBD"; + this.LongName = "TRANSFER Register B to D"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_BL | CONTROL_RDIL; } } @@ -758,10 +858,13 @@ class IS_TCA extends Microcode_Instruction { super(props); this.Bytecode = 0x046; this.Mnemonic = "TCA"; + this.LongName = "TRANSFER Register C to A"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_CL | CONTROL_RAIL; } } @@ -774,10 +877,13 @@ class IS_TCB extends Microcode_Instruction { super(props); this.Bytecode = 0x047; this.Mnemonic = "TCB"; + this.LongName = "TRANSFER Register C to B"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_CL | CONTROL_RBIL; } } @@ -790,10 +896,13 @@ class IS_TCD extends Microcode_Instruction { super(props); this.Bytecode = 0x048; this.Mnemonic = "TCD"; + this.LongName = "TRANSFER Register C to D"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_CL | CONTROL_RDIL; } } @@ -806,10 +915,13 @@ class IS_TDA extends Microcode_Instruction { super(props); this.Bytecode = 0x049; this.Mnemonic = "TDA"; + this.LongName = "TRANSFER Register D to A"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_DL | CONTROL_RAIL; } } @@ -822,10 +934,13 @@ class IS_TDB extends Microcode_Instruction { super(props); this.Bytecode = 0x04A; this.Mnemonic = "TDB"; + this.LongName = "TRANSFER Register D to B"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_DL | CONTROL_RBIL; } } @@ -838,10 +953,13 @@ class IS_TDC extends Microcode_Instruction { super(props); this.Bytecode = 0x04B; this.Mnemonic = "TDC"; + this.LongName = "TRANSFER Register D to C"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_DL | CONTROL_RCIL; } } @@ -855,10 +973,13 @@ class IS_ADD extends Microcode_Instruction { super(props); this.Bytecode = 0x100; this.Mnemonic = "ADD"; + this.LongName = "Addition"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_ADD | CONTROL_OUT_AB; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO; } @@ -871,10 +992,13 @@ class IS_SUB extends Microcode_Instruction { super(props); this.Bytecode = 0x101; this.Mnemonic = "SUB"; + this.LongName = "Subtraction"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_SUB; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO; } @@ -887,15 +1011,18 @@ class IS_NOT extends Microcode_Instruction { super(props); this.Bytecode = 0x102; this.Mnemonic = "NOT"; + this.LongName = "Logical NOT"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 9; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_AL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; this.Microcode[4] = CONTROL_RAIL; this.Microcode[5] = CONTROL_ALU_NOT; - this.Microcode[6] = CONTROL_RBIL | CONTROL_OUT_AO | CONTROL_SPC; + this.Microcode[6] = CONTROL_OUT_AO | CONTROL_RBIL | CONTROL_SPC; this.Microcode[7] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[8] = CONTROL_OUT_RO | CONTROL_RAIL; } @@ -908,10 +1035,13 @@ class IS_FNOT extends Microcode_Instruction { super(props); this.Bytecode = 0x103; this.Mnemonic = "FNOT"; + this.LongName = "Logical FAST NOT"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_NOT; this.Microcode[3] = CONTROL_RBIL | CONTROL_OUT_AO | CONTROL_SPC; } @@ -924,10 +1054,13 @@ class IS_AND extends Microcode_Instruction { super(props); this.Bytecode = 0x104; this.Mnemonic = "AND"; + this.LongName = "Logical AND"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_AND; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO | CONTROL_SPC; } @@ -940,10 +1073,13 @@ class IS_NAND extends Microcode_Instruction { super(props); this.Bytecode = 0x105; this.Mnemonic = "NAND"; + this.LongName = "Logical NAND"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_NAND; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO | CONTROL_SPC; } @@ -956,10 +1092,13 @@ class IS_OR extends Microcode_Instruction { super(props); this.Bytecode = 0x106; this.Mnemonic = "OR"; + this.LongName = "Logical OR"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_OR; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO | CONTROL_SPC; } @@ -972,10 +1111,13 @@ class IS_NOR extends Microcode_Instruction { super(props); this.Bytecode = 0x107; this.Mnemonic = "NOR"; + this.LongName = "Logical NOR"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_NOR; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO | CONTROL_SPC; } @@ -988,10 +1130,13 @@ class IS_XOR extends Microcode_Instruction { super(props); this.Bytecode = 0x108; this.Mnemonic = "XOR"; + this.LongName = "Logical XOR"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_XOR; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO | CONTROL_SPC; } @@ -1004,10 +1149,13 @@ class IS_XNOR extends Microcode_Instruction { super(props); this.Bytecode = 0x109; this.Mnemonic = "XNOR"; + this.LongName = "Logical XNOR"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_ALU_XNOR; this.Microcode[3] = CONTROL_RAIL | CONTROL_OUT_AO | CONTROL_SPC; } @@ -1020,12 +1168,14 @@ class IS_CMP extends Microcode_Instruction { super(props); this.Bytecode = 0x10A; this.Mnemonic = "CMP"; + this.LongName = "Logical COMPARE"; this.Aliases = new Array(); - this.Type = InstructionTypes.SingleWord; - this.Operands = new Array(); - this.Microcode[2] = CONTROL_ALU_ADD | CONTROL_OUT_AB; - this.Microcode[3] = CONTROL_MCL0; + this.Type = InstructionTypes.Register; + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "B", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 3; + this.Microcode[2] = CONTROL_OUT_AB | CONTROL_ALU_ADD; } } is_CMP = new IS_CMP; @@ -1036,10 +1186,13 @@ class IS_CMP_gpcd_abs extends Microcode_Instruction { super(props); this.Bytecode = 0x10B; this.Mnemonic = "CMP"; + this.LongName = "Logical COMPARE"; this.Aliases = new Array(); - this.Type = InstructionTypes.Register; - this.Operands = new Array("CD"); + this.Type = InstructionTypes.Absolute; + this.Operands = new Array({Operand: "CD", Bitwidth: 16}); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_CD | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_ALU_ADD; } @@ -1052,10 +1205,13 @@ class IS_CMP_gpc_gpd extends Microcode_Instruction { super(props); this.Bytecode = 0x10C; this.Mnemonic = "CMP"; + this.LongName = "Logical COMPARE"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; - this.Operands = new Array("C","D"); + this.Operands = new Array({Operand: "C", Bitwidth: 8},{Operand: "D", Bitwidth: 8}); + this.Words = 1; + this.Cycles = 3; this.Microcode[2] = CONTROL_OUT_CD | CONTROL_ALU_ADD; } } @@ -1067,10 +1223,13 @@ class IS_ADD_gpa_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x10D; this.Mnemonic = "ADD"; + this.LongName = "Addition"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; - this.Operands = new Array("A","$"); + this.Operands = new Array({Operand: "A", Bitwidth: 8},{Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 10; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_BL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; this.Microcode[4] = CONTROL_OUT_PC | CONTROL_RRI; @@ -1089,10 +1248,13 @@ class IS_ADD_gpb_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x10E; this.Mnemonic = "ADD"; + this.LongName = "Addition"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; - this.Operands = new Array("B","$"); + this.Operands = new Array({Operand: "B", Bitwidth: 8},{Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 10; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_AL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; this.Microcode[4] = CONTROL_OUT_PC | CONTROL_RRI; @@ -1111,10 +1273,13 @@ class IS_ADD_gpc_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x10F; this.Mnemonic = "ADD"; + this.LongName = "Addition"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; - this.Operands = new Array("C","$"); + this.Operands = new Array({Operand: "C", Bitwidth: 8},{Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 10; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_AL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; this.Microcode[4] = CONTROL_OUT_PC | CONTROL_RRI; @@ -1134,10 +1299,13 @@ class IS_ADD_gpd_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x110; this.Mnemonic = "ADD"; + this.LongName = "Addition"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; - this.Operands = new Array("D","$"); + this.Operands = new Array({Operand: "D", Bitwidth: 8},{Operand: "$", Bitwidth: 8}); + this.Words = 2; + this.Cycles = 10; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_AL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; this.Microcode[4] = CONTROL_OUT_PC | CONTROL_RRI; @@ -1151,31 +1319,19 @@ class IS_ADD_gpd_imm extends Microcode_Instruction { is_ADD_gpdi = new IS_ADD_gpd_imm; Instructions.push(is_ADD_gpdi); -class IS_CMP_gpa_gpb extends Microcode_Instruction { - constructor(props) { - super(props); - this.Bytecode = 0x111; - this.Mnemonic = "CMP"; - this.Aliases = new Array(); - - this.Type = InstructionTypes.Register; - this.Operands = new Array("A", "B"); - this.Microcode[2] = CONTROL_OUT_AB | CONTROL_ALU_ADD; - } -} -is_CMP_gpab = new IS_CMP_gpa_gpb(); -Instructions.push(is_CMP_gpab); - class IS_PHA extends Microcode_Instruction { constructor(props) { super(props); this.Bytecode = 0x180; this.Mnemonic = "PHA"; + this.LongName = "PUSH Register A to the STACK"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_AL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; } @@ -1188,10 +1344,13 @@ class IS_PHB extends Microcode_Instruction { super(props); this.Bytecode = 0x181; this.Mnemonic = "PHB"; + this.LongName = "PUSH Register B to the STACK"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_BL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; } @@ -1204,10 +1363,13 @@ class IS_PHC extends Microcode_Instruction { super(props); this.Bytecode = 0x182; this.Mnemonic = "PHC"; + this.LongName = "PUSH Register C to the STACK"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_CL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; } @@ -1220,10 +1382,13 @@ class IS_PHD extends Microcode_Instruction { super(props); this.Bytecode = 0x183; this.Mnemonic = "PHD"; + this.LongName = "PUSH Register D to the STACK"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_DL | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; } @@ -1236,10 +1401,13 @@ class IS_PHAB extends Microcode_Instruction { super(props); this.Bytecode = 0x184; this.Mnemonic = "PHAB"; + this.LongName = "PUSH Register A and B to the STACK"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_AB | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; } @@ -1252,10 +1420,13 @@ class IS_PHCD extends Microcode_Instruction { super(props); this.Bytecode = 0x185; this.Mnemonic = "PHCD"; + this.LongName = "PUSH Register C and D to the STACK"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_CD | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; } @@ -1269,10 +1440,13 @@ class IS_PLA extends Microcode_Instruction { super(props); this.Bytecode = 0x1A0; this.Mnemonic = "PLA"; + this.LongName = "PULL Stack and place in Register A (Low BYTE)"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 5; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RAIL; @@ -1286,9 +1460,12 @@ class IS_PLB extends Microcode_Instruction { super(props); this.Bytecode = 0x1A1; this.Mnemonic = "PLB"; + this.LongName = "PULL Stack and place in Register B (Low BYTE)"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; + this.Words = 1; + this.Cycles = 5; this.Operands = new Array(); this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; @@ -1303,10 +1480,13 @@ class IS_PLC extends Microcode_Instruction { super(props); this.Bytecode = 0x1A2; this.Mnemonic = "PLC"; + this.LongName = "PULL Stack and place in Register C (Low BYTE)"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 5; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RCIL; @@ -1320,10 +1500,13 @@ class IS_PLD extends Microcode_Instruction { super(props); this.Bytecode = 0x1A3; this.Mnemonic = "PLD"; + this.LongName = "PULL Stack and place in Register D (Low BYTE)"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 5; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RDIL; @@ -1337,10 +1520,13 @@ class IS_PLAB extends Microcode_Instruction { super(props); this.Bytecode = 0x1A4; this.Mnemonic = "PLAB"; + this.LongName = "PULL Stack and place in Register A and B"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 5; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RAIL | CONTROL_RBIH; @@ -1354,10 +1540,13 @@ class IS_PLCD extends Microcode_Instruction { super(props); this.Bytecode = 0x1A5; this.Mnemonic = "PLCD"; + this.LongName = "PULL Stack and place in Register C and D"; this.Aliases = new Array(); this.Type = InstructionTypes.Register; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 5; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_RCIL | CONTROL_RDIH; @@ -1372,10 +1561,13 @@ class IS_JMP_imm extends Microcode_Instruction { super(props); this.Bytecode = 0x200; this.Mnemonic = "JMP"; + this.LongName = "JUMP to address"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array(`$`); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 4; this.Microcode[2] = CONTROL_OUT_PC | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_RO | CONTROL_PCI; } @@ -1389,10 +1581,15 @@ class IS_BCC_imm extends Microcode_Instruction { this.UsesCarry = true; this.Bytecode = 0x201; this.Mnemonic = "BCC"; + this.LongName = "Branch if Carry Clear"; this.Aliases = new Array("JNC"); this.Type = InstructionTypes.Immediate; - this.Operands = new Array(`$`); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 4; + this.CarryWords = 2; + this.CarryCycles = 3; this.MicrocodeCarry = new Array(16); for (let a = 0; a < 16; a++) { this.MicrocodeCarry[a] = this.Microcode[a]; @@ -1411,10 +1608,15 @@ class IS_BCS_imm extends Microcode_Instruction { this.UsesCarry = true; this.Bytecode = 0x202; this.Mnemonic = "BCS"; + this.LongName = "Branch if Carry Set"; this.Aliases = new Array("JC"); this.Type = InstructionTypes.Immediate; - this.Operands = new Array(`$`); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 3; + this.CarryWords = 2; + this.CarryCycles = 4; this.MicrocodeCarry = new Array(16); for (let a = 0; a < 16; a++) { this.MicrocodeCarry[a] = this.Microcode[a]; @@ -1434,10 +1636,15 @@ class IS_BEQ_imm extends Microcode_Instruction { this.UsesZero = true; this.Bytecode = 0x203; this.Mnemonic = "BEQ"; + this.LongName = "Branch if Equal"; this.Aliases = new Array("JE","JZ"); this.Type = InstructionTypes.Immediate; - this.Operands = new Array(`$`); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 3; + this.ZeroWords = 2; + this.ZeroCycles = 4; this.MicrocodeZero = new Array(16); for (let a = 0; a < 16; a++) { this.MicrocodeZero[a] = this.Microcode[a]; @@ -1457,10 +1664,15 @@ class IS_BNE_imm extends Microcode_Instruction { this.UsesZero = true; this.Bytecode = 0x204; this.Mnemonic = "BNE"; + this.LongName = "Branch if NOT Equal"; this.Aliases = new Array("JNE","JNZ"); this.Type = InstructionTypes.Immediate; - this.Operands = new Array(`$`); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 4; + this.ZeroWords = 2; + this.ZeroCycles = 3; this.MicrocodeZero = new Array(16); for (let a = 0; a < 16; a++) { this.MicrocodeZero[a] = this.Microcode[a]; @@ -1479,10 +1691,13 @@ class IS_JSR extends Microcode_Instruction { super(props); this.Bytecode = 0x205; this.Mnemonic = "JSR"; + this.LongName = "JUMP to Subroutine"; this.Aliases = new Array(); this.Type = InstructionTypes.Immediate; - this.Operands = new Array(`$`); + this.Operands = new Array({Operand: "$", Bitwidth: 16}); + this.Words = 2; + this.Cycles = 6; this.Microcode[2] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[3] = CONTROL_OUT_PC | CONTROL_RI | CONTROL_SPD | CONTROL_SPC; this.Microcode[4] = CONTROL_OUT_PC | CONTROL_RRI; @@ -1498,10 +1713,13 @@ class IS_RTS extends Microcode_Instruction { super(props); this.Bytecode = 0x206; this.Mnemonic = "RTS"; + this.LongName = "RETURN from Subroutine"; this.Aliases = new Array(); this.Type = InstructionTypes.SingleWord; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 6; this.Microcode[2] = CONTROL_SPC; this.Microcode[3] = CONTROL_OUT_SP | CONTROL_RRI; this.Microcode[4] = CONTROL_OUT_RO | CONTROL_PCI; @@ -1518,10 +1736,13 @@ class IS_NOP extends Microcode_Instruction { super(props); this.Bytecode = 0x3ff; this.Mnemonic = "NOP"; + this.LongName = "NO OPERATION"; this.Aliases = new Array(); this.Type = InstructionTypes.SingleWord; this.Operands = new Array(); + this.Words = 1; + this.Cycles = 2; } } is_NOP = new IS_NOP;