Colorized registers as well, RED is WRITE, GREEN is direct read (for SP and PC green is Incremenet UP, for SP blue is increment DOWN). Darker color is Low byte, brighter is High byte
This commit is contained in:
MatCat
parent
a3f5382437
commit
0e06cfc332
168
js/cpu.js
168
js/cpu.js
@ -1,3 +1,73 @@
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// Setup a few bitmasks we can use in the code that are handy to clean inputs to registers
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const BITMASK_8 = 0x00000000000000ff;
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const BITMASK_16 = 0x000000000000ffff;
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const BITMASK_24 = 0x0000000000ffffff;
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// These are the control lines that are controlled by the microcode RAM output
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const CONTROL_PCC = 0b00000000000000000000000000000001; // PC CLK UP
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const CONTROL_PCI = 0b00000000000000000000000000000010; // PC Input Enable
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const CONTROL_SPD = 0b00000000000000000000000000000100; // SP Count Down
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const CONTROL_SPC = 0b00000000000000000000000000001000; // SP CLK (UP / DOWN)
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const CONTROL_SPI = 0b00000000000000000000000000010000; // SP Input Enable
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const CONTROL_RAIL = 0b00000000000000000000000000100000; // GPA LOW Input Enable
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const CONTROL_RAIH = 0b00000000000000000000000001000000; // GPA HIGH Input Enable
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const CONTROL_RBIL = 0b00000000000000000000000010000000; // GPB LOW Input Enable
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const CONTROL_RBIH = 0b00000000000000000000000100000000; // GPB HIGH Input Enable
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const CONTROL_RCIL = 0b00000000000000000000001000000000; // GPC LOW Input Enable
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const CONTROL_RCIH = 0b00000000000000000000010000000000; // GPC HIGH Input Enable
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const CONTROL_RDIL = 0b00000000000000000000100000000000; // GPD LOW Input Enable
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const CONTROL_RDIH = 0b00000000000000000001000000000000; // GPD HIGH Input Enable
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const CONTROL_RRI = 0b00000000000000000010000000000000; // LOW Ram Register Input Enable
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const CONTROL_RHI = 0b00000000000000000100000000000000; // HIGH Ram Register Input Enable
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const CONTROL_ALUM0 = 0b00000000000000001000000000000000; // ALU MUX 0
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const CONTROL_ALUM1 = 0b00000000000000010000000000000000; // ALU MUX 1
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const CONTROL_ALUI = 0b00000000000000100000000000000000; // ALU Invert (high side)
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const CONTROL_ALUC = 0b00000000000001000000000000000000; // ALU Carry Input
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const CONTROL_ALUSL = 0b00000000000010000000000000000000; // ALU Shift Left
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const CONTROL_ALUSR = 0b00000000000100000000000000000000; // ALU Shift Right
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const CONTROL_OEM0 = 0b00000000001000000000000000000000; // Output Enable MUX 0
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const CONTROL_OEM1 = 0b00000000010000000000000000000000; // Output Enable MUX 1
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const CONTROL_OEM2 = 0b00000000100000000000000000000000; // Output Enable MUX 2
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const CONTROL_OEM3 = 0b00000001000000000000000000000000; // Output Enable MUX 3
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const CONTROL_OEM4 = 0b00000010000000000000000000000000; // Output Enable MUX 4
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const CONTROL_OEME = 0b00000100000000000000000000000000; // Output Enable MUX Enable
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const CONTROL_RI = 0b00010000000000000000000000000000; // RAM Input Enable
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const CONTROL_IRI = 0b00100000000000000000000000000000; // Instruction Register Input Enable
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const CONTROL_MCL0 = 0b01000000000000000000000000000000; // Microcode Counter to 0
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const CONTROL_MCL8 = 0b10000000000000000000000000000000; // Microcode Counter to 8
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// These are the output enable control lines, they are muxed since none of them can ever be on together
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const OECONTROL_PC = 0b00000 // PC Register
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const OECONTROL_SP = 0b00001 // SP Register
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const OECONTROL_AL = 0b00010 // GPA to LOW
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const OECONTROL_AH = 0b00011 // GPA to HIGH
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const OECONTROL_BL = 0b00100 // GPB to LOW
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const OECONTROL_BH = 0b00101 // GPB to HIGH
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const OECONTROL_CL = 0b00110 // GPC to LOW
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const OECONTROL_CH = 0b00111 // GPC to HIGH
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const OECONTROL_DL = 0b01000 // GPD to LOW
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const OECONTROL_DH = 0b01001 // GPD to HIGH
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const OECONTROL_AB = 0b01010 // GPB to HIGH, GPA to LOW
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const OECONTROL_AC = 0b01011 // GPC to HIGH, GPA to LOW
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const OECONTROL_AD = 0b01100 // GPD to HIGH, GPA to LOW
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const OECONTROL_BA = 0b01101 // GPA to HIGH, GPB to LOW
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const OECONTROL_BC = 0b01110 // GPC to HIGH, GPB to LOW
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const OECONTROL_BD = 0b01111 // GPD to HIGH, GPB to LOW
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const OECONTROL_CA = 0b10000 // GPA to HIGH, GPC to LOW
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const OECONTROL_CB = 0b10001 // GPB to HIGH, GPC to LOW
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const OECONTROL_CD = 0b10010 // GPD to HIGH, GPC to LOW
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const OECONTROL_DA = 0b10011 // GPA to HIGH, GPD to LOW
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const OECONTROL_DB = 0b10100 // GPB to HIGH, GPD to LOW
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const OECONTROL_DC = 0b10101 // GPC to HIGH, GPD to LOW
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const OECONTROL_AE = 0b11100 // ALU Enable
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const OECONTROL_AO = 0b11101 // ALU Output to LOW
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const OECONTROL_SR = 0b11110 // Status Register to LOW
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const OECONTROL_RO = 0b11111 // RAM to DATABUS Enable
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let intval = null;
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let intval = null;
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let breakpt = null;
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let breakpt = null;
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@ -149,95 +219,57 @@ function updateHTML() {
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sp_data.innerText = "0x" + formatHex(cpu.DATABUS,4);
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sp_data.innerText = "0x" + formatHex(cpu.DATABUS,4);
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let sp_pc = document.getElementById("PC_Register");
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let sp_pc = document.getElementById("PC_Register");
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sp_pc.innerText = "0x" + formatHex(cpu.PC,4);
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sp_pc.innerText = "0x" + formatHex(cpu.PC,4);
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sp_pc.style.backgroundColor = "transparent";
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if (cpu.MC_Controls & CONTROL_PCI) sp_pc.style.backgroundColor = "#ff5555";
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if (cpu.MC_Controls & CONTROL_PCC) sp_pc.style.backgroundColor = "#55ff55";
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let sp_mcc = document.getElementById("MCC_Register");
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let sp_mcc = document.getElementById("MCC_Register");
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sp_mcc.innerText = "0x" + cpu.MCC.toString(16).toUpperCase();
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sp_mcc.innerText = "0x" + cpu.MCC.toString(16).toUpperCase();
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let sp_co = document.getElementById("CO_Register");
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let sp_co = document.getElementById("CO_Register");
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sp_co.innerHTML = "0b" + formatBinary(cpu.MC_Controls,32,4,["Microcode Counter Reset to 8","Microcode Counter Reset to 0","Instruction Register Input Enable","RAM Input Enable","","Output MUX Enable","Output Enable MUX4","Output Enable MUX3","Output Enable MUX2","Output Enable MUX1","Output Enable MUX0","ALU Shift Right","ALU Shift Left","ALU Carry","ALU Invert B","ALU MUX1","ALU MUX0","RAM Address High Byte Input Enable","RAM Address Register Input Enable","GPD High Byte Input Enable","GPD Low Byte Input Enable","GPC High Byte Input Enable","GPC Low Byte Input Enable","GPB High Byte Input Enable","GPB Low Byte Input Enable","GPA High Byte Input Enable","GPA Low Byte Input Enable","SP Input Enable","SP Counter Clock","SP Decrement","PC Input Enable","PC Increment"]);
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sp_co.innerHTML = "0b" + formatBinary(cpu.MC_Controls,32,4,["Microcode Counter Reset to 8","Microcode Counter Reset to 0","Instruction Register Input Enable","RAM Input Enable","","Output MUX Enable","Output Enable MUX4","Output Enable MUX3","Output Enable MUX2","Output Enable MUX1","Output Enable MUX0","ALU Shift Right","ALU Shift Left","ALU Carry","ALU Invert B","ALU MUX1","ALU MUX0","RAM Address High Byte Input Enable","RAM Address Register Input Enable","GPD High Byte Input Enable","GPD Low Byte Input Enable","GPC High Byte Input Enable","GPC Low Byte Input Enable","GPB High Byte Input Enable","GPB Low Byte Input Enable","GPA High Byte Input Enable","GPA Low Byte Input Enable","SP Input Enable","SP Counter Clock","SP Decrement","PC Input Enable","PC Increment"]);
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let sp_sp = document.getElementById("SP_Register");
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let sp_sp = document.getElementById("SP_Register");
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sp_sp.style.backgroundColor = "transparent";
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if (cpu.MC_Controls & CONTROL_SPI) sp_sp.style.backgroundColor = "#ff5555";
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if (cpu.MC_Controls & CONTROL_SPC) sp_sp.style.backgroundColor = "#55ff55";
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if (cpu.MC_Controls & CONTROL_SPD) sp_sp.style.backgroundColor = "#7777ff";
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sp_sp.innerText = "0x" + formatHex(cpu.SP,4);
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sp_sp.innerText = "0x" + formatHex(cpu.SP,4);
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let sp_sr = document.getElementById("SR_Register");
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let sp_sr = document.getElementById("SR_Register");
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sp_sr.innerHTML = "0b" + formatBinary(cpu.SR,8,4,["","","","","","Negative","Zero","Carry"]);
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sp_sr.innerHTML = "0b" + formatBinary(cpu.SR,8,4,["","","","","","Negative","Zero","Carry"]);
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let sp_ir = document.getElementById("IR_Register");
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let sp_ir = document.getElementById("IR_Register");
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sp_ir.innerText = "0b" + formatBinary(cpu.IR,16,4) + " (" + GetMnemonic(Instructions,cpu.IR) + ")";
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sp_ir.innerText = "0b" + formatBinary(cpu.IR,16,4) + " (" + GetMnemonic(Instructions,cpu.IR) + ")";
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sp_ir.style.backgroundColor = "transparent";
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if (cpu.MC_Controls & CONTROL_IRI) sp_ir.style.backgroundColor = "#ff5555";
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let sp_gpa = document.getElementById("GPA_Register");
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let sp_gpa = document.getElementById("GPA_Register");
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sp_gpa.innerText = "0x" + formatHex(cpu.GPA,2);
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sp_gpa.innerText = "0x" + formatHex(cpu.GPA,2);
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sp_gpa.style.backgroundColor = "transparent";
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if (cpu.MC_Controls & CONTROL_RAIL) sp_gpa.style.backgroundColor = "#cc5555";
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if (cpu.MC_Controls & CONTROL_RAIH) sp_gpa.style.backgroundColor = "#ff5555";
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if (cpu.OUTMUX === OECONTROL_AB || cpu.OUTMUX === OECONTROL_AC || cpu.OUTMUX === OECONTROL_AD || cpu.OUTMUX === OECONTROL_AL) sp_gpa.style.backgroundColor = "#55cc55";
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if (cpu.OUTMUX === OECONTROL_BA || cpu.OUTMUX === OECONTROL_CA || cpu.OUTMUX === OECONTROL_DA || cpu.OUTMUX === OECONTROL_AH) sp_gpa.style.backgroundColor = "#55ff55";
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let sp_gpb = document.getElementById("GPB_Register");
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let sp_gpb = document.getElementById("GPB_Register");
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sp_gpb.innerText = "0x" + formatHex(cpu.GPB,2);
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sp_gpb.innerText = "0x" + formatHex(cpu.GPB,2);
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sp_gpb.style.backgroundColor = "transparent";
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if (cpu.MC_Controls & CONTROL_RBIL) sp_gpb.style.backgroundColor = "#cc5555";
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if (cpu.MC_Controls & CONTROL_RBIH) sp_gpb.style.backgroundColor = "#ff5555";
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if (cpu.OUTMUX === OECONTROL_BA || cpu.OUTMUX === OECONTROL_BC || cpu.OUTMUX === OECONTROL_BD || cpu.OUTMUX === OECONTROL_BL) sp_gpb.style.backgroundColor = "#55cc55";
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if (cpu.OUTMUX === OECONTROL_AB || cpu.OUTMUX === OECONTROL_CB || cpu.OUTMUX === OECONTROL_DB || cpu.OUTMUX === OECONTROL_BH) sp_gpb.style.backgroundColor = "#55ff55";
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let sp_gpc = document.getElementById("GPC_Register");
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let sp_gpc = document.getElementById("GPC_Register");
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sp_gpc.innerText = "0x" + formatHex(cpu.GPC,2);
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sp_gpc.innerText = "0x" + formatHex(cpu.GPC,2);
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sp_gpc.style.backgroundColor = "transparent";
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if (cpu.MC_Controls & CONTROL_RCIL) sp_gpc.style.backgroundColor = "#cc5555";
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if (cpu.MC_Controls & CONTROL_RCIH) sp_gpc.style.backgroundColor = "#ff5555";
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if (cpu.OUTMUX === OECONTROL_CA || cpu.OUTMUX === OECONTROL_CB || cpu.OUTMUX === OECONTROL_CD || cpu.OUTMUX === OECONTROL_CL) sp_gpc.style.backgroundColor = "#55cc55";
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if (cpu.OUTMUX === OECONTROL_AC || cpu.OUTMUX === OECONTROL_BC || cpu.OUTMUX === OECONTROL_DC || cpu.OUTMUX === OECONTROL_CH) sp_gpc.style.backgroundColor = "#55ff55";
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let sp_gpd = document.getElementById("GPD_Register");
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let sp_gpd = document.getElementById("GPD_Register");
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sp_gpd.innerText = "0x" + formatHex(cpu.GPD,2);
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sp_gpd.innerText = "0x" + formatHex(cpu.GPD,2);
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sp_gpd.style.backgroundColor = "transparent";
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if (cpu.MC_Controls & CONTROL_RDIL) sp_gpd.style.backgroundColor = "#cc5555";
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if (cpu.MC_Controls & CONTROL_RDIH) sp_gpd.style.backgroundColor = "#ff5555";
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if (cpu.OUTMUX === OECONTROL_DA || cpu.OUTMUX === OECONTROL_DB || cpu.OUTMUX === OECONTROL_DC || cpu.OUTMUX === OECONTROL_DL) sp_gpd.style.backgroundColor = "#55cc55";
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if (cpu.OUTMUX === OECONTROL_AD || cpu.OUTMUX === OECONTROL_BD || cpu.OUTMUX === OECONTROL_CD || cpu.OUTMUX === OECONTROL_DH) sp_gpd.style.backgroundColor = "#55ff55";
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printRAM(cpu.RAM);
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printRAM(cpu.RAM);
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let sp_textout = document.getElementById("TEXT_OUT");
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let sp_textout = document.getElementById("TEXT_OUT");
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sp_textout.innerText = printTextOut(cpu.RAM,0x8000,0x83ff);
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sp_textout.innerText = printTextOut(cpu.RAM,0x8000,0x83ff);
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}
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}
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// Setup a few bitmasks we can use in the code that are handy to clean inputs to registers
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const BITMASK_8 = 0x00000000000000ff;
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const BITMASK_16 = 0x000000000000ffff;
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const BITMASK_24 = 0x0000000000ffffff;
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// These are the control lines that are controlled by the microcode RAM output
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const CONTROL_PCC = 0b00000000000000000000000000000001; // PC CLK UP
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const CONTROL_PCI = 0b00000000000000000000000000000010; // PC Input Enable
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const CONTROL_SPD = 0b00000000000000000000000000000100; // SP Count Down
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const CONTROL_SPC = 0b00000000000000000000000000001000; // SP CLK (UP / DOWN)
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const CONTROL_SPI = 0b00000000000000000000000000010000; // SP Input Enable
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const CONTROL_RAIL = 0b00000000000000000000000000100000; // GPA LOW Input Enable
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const CONTROL_RAIH = 0b00000000000000000000000001000000; // GPA HIGH Input Enable
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const CONTROL_RBIL = 0b00000000000000000000000010000000; // GPB LOW Input Enable
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const CONTROL_RBIH = 0b00000000000000000000000100000000; // GPB HIGH Input Enable
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const CONTROL_RCIL = 0b00000000000000000000001000000000; // GPC LOW Input Enable
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const CONTROL_RCIH = 0b00000000000000000000010000000000; // GPC HIGH Input Enable
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const CONTROL_RDIL = 0b00000000000000000000100000000000; // GPD LOW Input Enable
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const CONTROL_RDIH = 0b00000000000000000001000000000000; // GPD HIGH Input Enable
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const CONTROL_RRI = 0b00000000000000000010000000000000; // LOW Ram Register Input Enable
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const CONTROL_RHI = 0b00000000000000000100000000000000; // HIGH Ram Register Input Enable
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const CONTROL_ALUM0 = 0b00000000000000001000000000000000; // ALU MUX 0
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const CONTROL_ALUM1 = 0b00000000000000010000000000000000; // ALU MUX 1
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const CONTROL_ALUI = 0b00000000000000100000000000000000; // ALU Invert (high side)
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const CONTROL_ALUC = 0b00000000000001000000000000000000; // ALU Carry Input
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const CONTROL_ALUSL = 0b00000000000010000000000000000000; // ALU Shift Left
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const CONTROL_ALUSR = 0b00000000000100000000000000000000; // ALU Shift Right
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const CONTROL_OEM0 = 0b00000000001000000000000000000000; // Output Enable MUX 0
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const CONTROL_OEM1 = 0b00000000010000000000000000000000; // Output Enable MUX 1
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const CONTROL_OEM2 = 0b00000000100000000000000000000000; // Output Enable MUX 2
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const CONTROL_OEM3 = 0b00000001000000000000000000000000; // Output Enable MUX 3
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const CONTROL_OEM4 = 0b00000010000000000000000000000000; // Output Enable MUX 4
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const CONTROL_OEME = 0b00000100000000000000000000000000; // Output Enable MUX Enable
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const CONTROL_RI = 0b00010000000000000000000000000000; // RAM Input Enable
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const CONTROL_IRI = 0b00100000000000000000000000000000; // Instruction Register Input Enable
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const CONTROL_MCL0 = 0b01000000000000000000000000000000; // Microcode Counter to 0
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const CONTROL_MCL8 = 0b10000000000000000000000000000000; // Microcode Counter to 8
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// These are the output enable control lines, they are muxed since none of them can ever be on together
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const OECONTROL_PC = 0b00000 // PC Register
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const OECONTROL_SP = 0b00001 // SP Register
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const OECONTROL_AL = 0b00010 // GPA to LOW
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const OECONTROL_AH = 0b00011 // GPA to HIGH
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const OECONTROL_BL = 0b00100 // GPB to LOW
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const OECONTROL_BH = 0b00101 // GPB to HIGH
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const OECONTROL_CL = 0b00110 // GPC to LOW
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const OECONTROL_CH = 0b00111 // GPC to HIGH
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const OECONTROL_DL = 0b01000 // GPD to LOW
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const OECONTROL_DH = 0b01001 // GPD to HIGH
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const OECONTROL_AB = 0b01010 // GPB to HIGH, GPA to LOW
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const OECONTROL_AC = 0b01011 // GPC to HIGH, GPA to LOW
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const OECONTROL_AD = 0b01100 // GPD to HIGH, GPA to LOW
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const OECONTROL_BA = 0b01101 // GPA to HIGH, GPB to LOW
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const OECONTROL_BC = 0b01110 // GPC to HIGH, GPB to LOW
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const OECONTROL_BD = 0b01111 // GPD to HIGH, GPB to LOW
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const OECONTROL_CA = 0b10000 // GPA to HIGH, GPC to LOW
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const OECONTROL_CB = 0b10001 // GPB to HIGH, GPC to LOW
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const OECONTROL_CD = 0b10010 // GPD to HIGH, GPC to LOW
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const OECONTROL_DA = 0b10011 // GPA to HIGH, GPD to LOW
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const OECONTROL_DB = 0b10100 // GPB to HIGH, GPD to LOW
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const OECONTROL_DC = 0b10101 // GPC to HIGH, GPD to LOW
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const OECONTROL_AE = 0b11100 // ALU Enable
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const OECONTROL_AO = 0b11101 // ALU Output to LOW
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const OECONTROL_SR = 0b11110 // Status Register to LOW
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const OECONTROL_RO = 0b11111 // RAM to DATABUS Enable
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class CPU_8SA1 {
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class CPU_8SA1 {
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@ -350,7 +382,7 @@ class CPU_8SA1 {
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OUTMUX |= (MC_Controls & CONTROL_OEM2) ? 0b00100 : 0;
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OUTMUX |= (MC_Controls & CONTROL_OEM2) ? 0b00100 : 0;
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OUTMUX |= (MC_Controls & CONTROL_OEM1) ? 0b00010 : 0;
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OUTMUX |= (MC_Controls & CONTROL_OEM1) ? 0b00010 : 0;
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OUTMUX |= (MC_Controls & CONTROL_OEM0) ? 0b00001 : 0;
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OUTMUX |= (MC_Controls & CONTROL_OEM0) ? 0b00001 : 0;
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this.OUTMUX = OUTMUX;
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//console.log(`OUTPUT MUX: ${OUTMUX.toString(2)}`);
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//console.log(`OUTPUT MUX: ${OUTMUX.toString(2)}`);
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switch (OUTMUX) {
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switch (OUTMUX) {
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case OECONTROL_PC: {
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case OECONTROL_PC: {
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Reference in New Issue
Block a user